- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
This commit is contained in:
Tom Rini
2020-02-04 11:36:49 -05:00
26 changed files with 303 additions and 152 deletions

View File

@@ -8,19 +8,6 @@
#include <configs/x86-common.h>
/*
* By default, CONFIG_SYS_NS16550_PORT_MAPPED is enabled for port io serial.
* To use mmio base serial, enable CONFIG_SYS_NS16550_MEM32 and disable
* CONFIG_SYS_NS16550_PORT_MAPPED until ns16550 driver supports serial port
* configuration in run-time.
*
* #define CONFIG_SYS_NS16550_MEM32
* #undef CONFIG_SYS_NS16550_PORT_MAPPED
*/
#ifdef CONFIG_SYS_NS16550_MEM32
#undef CONFIG_SYS_NS16550_PORT_MAPPED
#endif
#define CONFIG_STD_DEVICES_SETTINGS \
"stdin=serial,i8042-kbd,usbkbd\0" \
"stdout=serial\0" \

View File

@@ -31,6 +31,9 @@
#define CONFIG_SYS_NS16550_REG_SIZE (-1)
#endif
#ifdef CONFIG_NS16550_DYNAMIC
#define UART_REG(x) unsigned char x
#else
#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
#error "Please define NS16550 registers size."
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL)
@@ -44,14 +47,24 @@
unsigned char x; \
unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
#endif
#endif /* CONFIG_NS16550_DYNAMIC */
enum ns16550_flags {
NS16550_FLAG_IO = 1 << 0, /* Use I/O access (else mem-mapped) */
NS16550_FLAG_ENDIAN = 1 << 1, /* Use out_le/be_32() */
NS16550_FLAG_BE = 1 << 2, /* Big-endian access (else little) */
};
/**
* struct ns16550_platdata - information about a NS16550 port
*
* @base: Base register address
* @reg_width: IO accesses size of registers (in bytes)
* @reg_width: IO accesses size of registers (in bytes, 1 or 4)
* @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...)
* @reg_offset: Offset to start of registers (normally 0)
* @clock: UART base clock speed in Hz
* @fcr: Offset of FCR register (normally UART_FCR_DEFVAL)
* @flags: A few flags (enum ns16550_flags)
* @bdf: PCI slot/function (pci_dev_t)
*/
struct ns16550_platdata {
@@ -61,6 +74,7 @@ struct ns16550_platdata {
int reg_offset;
int clock;
u32 fcr;
int flags;
#if defined(CONFIG_PCI) && defined(CONFIG_SPL)
int bdf;
#endif