From 9bd2e70b3122c3584e2378eb5dfa1fe199d03a42 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 28 Aug 2023 23:38:02 +0200 Subject: [PATCH 1/9] board: toradex: verdin-imx8mp: enable usb device and fastboot support Enable USB device and fastboot support which may be used to load the Toradex Easy Installer FIT image. While at it also enable USB mass storage aka UMS support. Note that the i.MX 8M Plus recovery mode support is based on the USB boot stage of the BOOTROM and does NOT require USB SDP SPL aka serial downloader support. Signed-off-by: Marcel Ziswiler Reviewed-by: Fabio Estevam --- configs/verdin-imx8mp_defconfig | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index bb20a2227f6..eec1d964b91 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -79,6 +79,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -108,6 +109,12 @@ CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_FSL_CAAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y @@ -138,6 +145,7 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y @@ -160,14 +168,20 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y -CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_EHCI_MX7 is not set CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_IMX_WATCHDOG=y CONFIG_HEXDUMP=y From 33e8020fd198926a5cc35f5834d99c324f094b71 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Tue, 17 Oct 2023 07:20:14 +0200 Subject: [PATCH 2/9] board: siemens: iot2050: Fix M.2 detection The "simpler" the logic, the higher the probability to not test and get things wrong, again: The absence of a "-PG2" suffix is not sufficient to derive that we are on PG1. There is also "IOT2050-ADVANCED-M2". Finally fix that by exactly matching against the two PG1 device names. While changing this, we can also drop the not really needed check for !board_is_sr1 in board_is_m2 and call the boards by their names ("board_is_pg1"). Reported-and-tested-by: Bao Cheng Su Signed-off-by: Jan Kiszka --- board/siemens/iot2050/board.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index e35e55fb5de..0b0686e2628 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -155,19 +155,20 @@ static bool board_is_advanced(void) strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; } -static bool board_is_sr1(void) +static bool board_is_pg1(void) { struct iot2050_info *info = IOT2050_INFO_DATA; return info->magic == IOT2050_INFO_MAGIC && - strstr((char *)info->name, "-PG2") == NULL; + (strcmp((char *)info->name, "IOT2050-BASIC") == 0 || + strcmp((char *)info->name, "IOT2050-ADVANCED") == 0); } static bool board_is_m2(void) { struct iot2050_info *info = IOT2050_INFO_DATA; - return !board_is_sr1() && info->magic == IOT2050_INFO_MAGIC && + return info->magic == IOT2050_INFO_MAGIC && strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; } @@ -217,14 +218,14 @@ void set_board_info_env(void) } if (board_is_advanced()) { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; else if(board_is_m2()) fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; else fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; } else { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6528-iot2050-basic.dtb"; else fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb"; From 7093b89ab12fae697548bbc839f3966642132221 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 16 Oct 2023 23:54:45 +0200 Subject: [PATCH 3/9] config: qemu: relax print and console buffer size QEMU print and console buffer sizes have been restricted on QEMU below their default values. One of the side effects of the print buffer size restriction is output truncation of the 'efidebug dh' command. As QEMU does not have special memory size restrictions remove the settings from the defconfig files and go with the generic defaults. Fixes: d0ee7f295d74 ("Convert CONFIG_SYS_PBSIZE to Kconfig") Fixes: d31466b382dd ("Convert CONFIG_SYS_CBSIZE to Kconfig") Signed-off-by: Heinrich Schuchardt Reviewed-by: Simon Glass --- configs/qemu-ppce500_defconfig | 1 - configs/qemu-riscv32_defconfig | 2 -- configs/qemu-riscv32_smode_defconfig | 2 -- configs/qemu-riscv32_spl_defconfig | 2 -- configs/qemu-riscv64_defconfig | 2 -- configs/qemu-riscv64_smode_defconfig | 2 -- configs/qemu-riscv64_spl_defconfig | 2 -- configs/qemu-x86_64_defconfig | 1 - configs/qemu-x86_defconfig | 1 - configs/qemu_arm64_defconfig | 2 -- configs/qemu_arm_defconfig | 2 -- 11 files changed, 19 deletions(-) diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index fbe84d57029..de7267e228e 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -21,7 +21,6 @@ CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PBSIZE=276 CONFIG_CMD_REGINFO=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 9ace68e73f1..cf74a48ea2c 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 0c7389e2f91..aeef2f35b0e 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -13,8 +13,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index e63d6fd9346..db9c971c2f7 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -19,8 +19,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 9a8bbef192b..9fb40b22f9b 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 1d0f021adeb..e3b123ca4d1 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -15,8 +15,6 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index b048bb8aed0..d6bf3130fe3 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -18,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index f02e9125a6d..2ff49fbd6ac 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -46,7 +46,6 @@ CONFIG_SPL_NET=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH=y CONFIG_SPL_RTC=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 4b2787d4aae..246ac6b6b8a 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -24,7 +24,6 @@ CONFIG_LOG=y CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 5fdf496a459..c010c25a928 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -27,8 +27,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 1347b86f34b..9cc1f5f7c40 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,8 +28,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y From ffdb85bfcfd79a432a9379a9a13680699eb686fb Mon Sep 17 00:00:00 2001 From: Wei Chen Date: Wed, 18 Oct 2023 14:27:44 +0800 Subject: [PATCH 4/9] misc: vexpress_config: Use member .priv_auto to set the private data In current vexpress_config_probe code, it sets the uclass private data directly. This will cause one compilation error: drivers/misc/vexpress_config.c:114:27: error: lvalue required as left operand of assignment 114 | dev_get_uclass_priv(dev) = priv; | ^ In this patch we set the uclass private data through struct member .priv_auto, and this compilation error disappears. Signed-off-by: Wei Chen Signed-off-by: Qi Feng Reviewed-by: Linus Walleij --- drivers/misc/vexpress_config.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c index 2baca48109f..99aad1412ae 100644 --- a/drivers/misc/vexpress_config.c +++ b/drivers/misc/vexpress_config.c @@ -92,7 +92,7 @@ static struct misc_ops vexpress_config_ops = { static int vexpress_config_probe(struct udevice *dev) { struct ofnode_phandle_args args; - struct vexpress_config_sysreg *priv; + struct vexpress_config_sysreg *priv = dev_get_priv(dev); const char *prop; int err, prop_size; @@ -105,11 +105,9 @@ static int vexpress_config_probe(struct udevice *dev) if (!prop || (strncmp(prop, "arm,vexpress-sysreg", 19) != 0)) return -ENOENT; - priv = calloc(1, sizeof(*priv)); if (!priv) return -ENOMEM; - dev_get_uclass_priv(dev) = priv; priv->addr = ofnode_get_addr(args.node); return dev_read_u32(dev, "arm,vexpress,site", &priv->site); @@ -127,4 +125,5 @@ U_BOOT_DRIVER(vexpress_config_drv) = { .bind = dm_scan_fdt_dev, .probe = vexpress_config_probe, .ops = &vexpress_config_ops, + .priv_auto = sizeof(struct vexpress_config_sysreg), }; From 86a5741c340f14bdd2f202019e2b7f093c7a64de Mon Sep 17 00:00:00 2001 From: Wei Chen Date: Wed, 18 Oct 2023 14:27:45 +0800 Subject: [PATCH 5/9] vexpress64: Add MMC card to the BOOT_TARGET_DEVICES of FVP Add MMC disk to FVP's BOOT_TARGET_DEVICES. This allows the user to boot from MMC devices. Signed-off-by: Wei Chen Signed-off-by: Qi Feng Reviewed-by: Linus Walleij --- include/configs/vexpress_aemv8.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 43f7e454d81..24d8ca08665 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -148,6 +148,12 @@ #define FUNC_VIRTIO(func) #endif +#ifdef CONFIG_CMD_MMC +#define FUNC_MMC(func) func(MMC, mmc, 0) +#else +#define FUNC_MMC(func) +#endif + /* * Boot by loading an Android image, or kernel, initrd and FDT through * semihosting into DRAM. @@ -204,6 +210,7 @@ func(SMH, smh, na) \ func(MEM, mem, na) \ FUNC_VIRTIO(func) \ + FUNC_MMC(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) From b254975b1a3848afc0037854eefb4af5004316ba Mon Sep 17 00:00:00 2001 From: Udit Kumar Date: Thu, 19 Oct 2023 12:57:53 +0530 Subject: [PATCH 6/9] driver: misc: k3_avs: Add support for thermal shutdown To avoid thermal burn out, program thermal shutdown value in VTM (Voltage and Thermal Manager) IP. Part of Linux kernel driver (drivers/thermal/k3_j72xx_bandgap.c) is ported from kernel 6.6-rc1, which sets thermal shutdown values. Signed-off-by: Udit Kumar Signed-off-by: Neha Francis --- drivers/misc/k3_avs.c | 104 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index acfc7318452..9a088244dd1 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i)) @@ -25,11 +26,28 @@ #define AM6_VTM_OPP_SHIFT(opp) (8 * (opp)) #define AM6_VTM_OPP_MASK 0xff +#define K3_VTM_DEVINFO_PWR0_OFFSET 0x4 +#define K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK 0xf0 +#define K3_VTM_TMPSENS0_CTRL_OFFSET 0x300 +#define K3_VTM_TMPSENS_STAT_OFFSET 0x8 +#define K3_VTM_ANYMAXT_OUTRG_ALERT_EN 0x1 +#define K3_VTM_LOW_TEMP_OFFSET 0x10 +#define K3_VTM_MISC_CTRL2_OFFSET 0x10 +#define K3_VTM_MISC_CTRL1_OFFSET 0xc +#define K3_VTM_TMPSENS_CTRL1_SOC BIT(5) +#define K3_VTM_TMPSENS_CTRL_CLRZ BIT(6) +#define K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN BIT(11) +#define K3_VTM_ADC_COUNT_FOR_123C 0x2f8 +#define K3_VTM_ADC_COUNT_FOR_105C 0x288 +#define K3_VTM_ADC_WA_VALUE 0x2c +#define K3_VTM_FUSE_MASK 0xc0000000 + #define VD_FLAG_INIT_DONE BIT(0) struct k3_avs_privdata { void *base; struct vd_config *vd_config; + struct udevice *dev; }; struct opp { @@ -237,6 +255,88 @@ static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv) return 0; } +/* k3_avs_program_tshut : Program thermal shutdown value for SOC + * set the values corresponding to thresholds to ~123C and 105C + * This is optional feature, Few times OS driver takes care of + * tshut programing. + */ + +static void k3_avs_program_tshut(struct k3_avs_privdata *priv) +{ + int cnt, id, val; + int workaround_needed = 0; + u32 ctrl_offset; + void __iomem *cfg2_base; + void __iomem *fuse_base; + + cfg2_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 1); + if (IS_ERR(cfg2_base)) { + dev_err(priv->dev, "cfg base is not defined\n"); + return; + } + + /* + * Some of TI's J721E SoCs require a software trimming procedure + * for the temperature monitors to function properly. To determine + * if this particular SoC is NOT affected, both bits in the + * WKUP_SPARE_FUSE0[31:30] will be set (0xC0000000) indicating + * when software trimming should NOT be applied. + * + * https://www.ti.com/lit/er/sprz455c/sprz455c.pdf + * This routine checks if workaround_needed to be applied or not + * based upon workaround_needed, adjust fixed value of tshut high and low + */ + + if (device_is_compatible(priv->dev, "ti,j721e-vtm")) { + fuse_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 2); + if (IS_ERR(fuse_base)) { + dev_err(priv->dev, "fuse-base is not defined for J721E Soc\n"); + return; + } + + if (!((readl(fuse_base) & K3_VTM_FUSE_MASK) == K3_VTM_FUSE_MASK)) + workaround_needed = 1; + } + + dev_dbg(priv->dev, "Work around %sneeded\n", workaround_needed ? "" : "not "); + + /* Get the sensor count in the VTM */ + val = readl(priv->base + K3_VTM_DEVINFO_PWR0_OFFSET); + cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; + cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); + + /* Program the thermal sensors */ + for (id = 0; id < cnt; id++) { + ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; + + val = readl(cfg2_base + ctrl_offset); + val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | + K3_VTM_TMPSENS_CTRL1_SOC | + K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); + writel(val, cfg2_base + ctrl_offset); + } + + /* + * Program TSHUT thresholds + * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 + * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit + * This is already taken care as per of init + * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit + */ + + /* Low thresholds for tshut*/ + val = (K3_VTM_ADC_COUNT_FOR_105C - workaround_needed * K3_VTM_ADC_WA_VALUE) + << K3_VTM_LOW_TEMP_OFFSET; + /* high thresholds */ + val |= K3_VTM_ADC_COUNT_FOR_123C - workaround_needed * K3_VTM_ADC_WA_VALUE; + + writel(val, cfg2_base + K3_VTM_MISC_CTRL2_OFFSET); + /* ramp-up delay from Linux code */ + mdelay(100); + val = readl(cfg2_base + K3_VTM_MISC_CTRL1_OFFSET) | K3_VTM_ANYMAXT_OUTRG_ALERT_EN; + writel(val, cfg2_base + K3_VTM_MISC_CTRL1_OFFSET); +} + /** * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data * @@ -255,6 +355,7 @@ static int k3_avs_probe(struct udevice *dev) int ret; priv = dev_get_priv(dev); + priv->dev = dev; k3_avs_priv = priv; @@ -294,6 +395,9 @@ static int k3_avs_probe(struct udevice *dev) k3_avs_program_voltage(priv, vd, vd->opp); } + if (!device_is_compatible(priv->dev, "ti,am654-avs")) + k3_avs_program_tshut(priv); + return 0; } From 9727e3ab7aff88cb0c8115eb3231af7e25317d01 Mon Sep 17 00:00:00 2001 From: Ilias Apalodimas Date: Thu, 19 Oct 2023 16:54:19 +0300 Subject: [PATCH 7/9] board: synquacer: Update the flash image layout The SynQuacer Developerbox, in EFI mode, supports A/B capsule updates and single image ones. The flash layout in the latter case is outdated, update it with the new offsets and images Signed-off-by: Ilias Apalodimas Tested-By: Masahisa Kojima --- board/socionext/developerbox/developerbox.c | 23 +-------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 9585944d80c..ac4415ff3bb 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -20,39 +20,18 @@ #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { -#if CONFIG_IS_ENABLED(FWU_MULTI_BANK_UPDATE) { .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, .fw_name = u"DEVELOPERBOX-FIP", .image_index = 1, }, -#else - { - .image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-UBOOT", - .image_index = 1, - }, - { - .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-FIP", - .image_index = 2, - }, - { - .image_type_id = DEVELOPERBOX_OPTEE_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-OPTEE", - .image_index = 3, - }, -#endif }; struct efi_capsule_update_info update_info = { - .dfu_string = "mtd nor1=u-boot.bin raw 200000 100000;" - "fip.bin raw 180000 78000;" - "optee.bin raw 500000 100000", + .dfu_string = "mtd nor1=fip.bin raw 600000 400000", .num_images = ARRAY_SIZE(fw_images), .images = fw_images, }; - #endif /* EFI_HAVE_CAPSULE_SUPPORT */ static struct mm_region sc2a11_mem_map[] = { From e9bf0ce6c1e987e7af859e94e5e6ce44dfb4ede0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20F=C3=A4cknitz?= Date: Fri, 20 Oct 2023 01:06:55 +0200 Subject: [PATCH 8/9] mpc85xx: relocate code in non-SPL build MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When building a non-SPL image, relocation is needed. This patch restores the old behaviour before commit b35316fb67cb ("Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig") was only defined if CONFIG_SPL_BUILD was defined. Fixes: b35316fb67cb ("Convert CONFIG_SPL_INIT_MINIMAL et al to Kconfig") Signed-off-by: Martin Fäcknitz --- arch/powerpc/cpu/mpc85xx/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index e9c30427734..b737d5d12f1 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1617,7 +1617,7 @@ relocate_code: mr r10,r5 /* Save copy of Destination Address */ GET_GOT -#ifndef CONFIG_SPL_SKIP_RELOCATE +#if !defined(CONFIG_SPL_SKIP_RELOCATE) || !defined(CONFIG_SPL_BUILD) mr r3,r5 /* Destination Address */ lis r4,CONFIG_VAL(SYS_MONITOR_BASE)@h /* Source Address */ ori r4,r4,CONFIG_VAL(SYS_MONITOR_BASE)@l From fef1ecf4150c63be0c8182b5edcb8cf5aa45dffc Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Sun, 22 Oct 2023 20:07:26 +0200 Subject: [PATCH 9/9] iot2050: Allow for more than 1 USB storage device This was lost in refactoring while some users of the IOT2050 expect it to work: Make sure that up to 3 USB storage devices are probed. Fixes: 53873974a4b0 ("include: armv7: Enable distroboot across all configs") Signed-off-by: Jan Kiszka Reviewed-by: Heinrich Schuchardt --- include/configs/iot2050.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 4968722d18f..94a9c767882 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,6 +15,15 @@ #include +/* allow up to 3 USB storage devices */ +#ifdef CONFIG_CMD_USB +#undef BOOT_TARGET_USB +#define BOOT_TARGET_USB(func) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ + func(USB, usb, 2) +#endif + /* * This defines all MMC devices, even if the basic variant has no mmc1. * The non-supported device will be removed from the boot targets during