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ARMv8/ls2085a_emu: Enable DP-DDR as standalone memory block

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DP-DDR is used for DPAA, separated from main memory pool for general
use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit).

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun
2014-08-13 10:21:05 -07:00
parent 1d71efbb03
commit d9c68b1444
6 changed files with 89 additions and 5 deletions
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14
include/configs/ls2085a_common.h
View File

@@ -54,6 +54,18 @@
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
#define CONFIG_SYS_DP_DDR_BASE 0x6000000000ULL
/*
* DDR controller use 0 as the base address for binding.
* It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access.
*/
#define CONFIG_SYS_DP_DDR_BASE_PHY 0
#define CONFIG_DP_DDR_CTRL 2
#define CONFIG_DP_DDR_NUM_CTRLS 1
#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 12000000 /* 12MHz */
@@ -236,7 +248,7 @@
#define CONFIG_SYS_CLK_FREQ 133333333
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_NR_DRAM_BANKS 3
#define CONFIG_SYS_HZ 1000

1
include/configs/ls2085a_emu.h
View File

@@ -13,6 +13,7 @@
#define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
#define SPD_EEPROM_ADDRESS3 0x53
#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
#define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */