stm32f7: enable instruction & data cache

It also enables commands for cache enable/disable/status.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
This commit is contained in:
Vikas Manocha
2017-03-27 13:02:45 -07:00
committed by Tom Rini
parent bf4d0495d2
commit dc11d83a2e
2 changed files with 3 additions and 3 deletions

View File

@@ -12,9 +12,6 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
#define CONFIG_SYS_TEXT_BASE 0x08000000
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
/*
* Configuration of the external SDRAM memory
*/
@@ -78,4 +75,5 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_MEM
#define CONFIG_CMD_CACHE
#endif /* __CONFIG_H */