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ARM: renesas: Add R8A77980 V3HSK board and CPLD code

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Add board code for the R8A77980 V3HSK board.
Add CPLD sysreset driver to the R-Car V3H SK board.
Extracted from a larger patch by Valentine Barshak.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync configs and board code with V3H Condor, squash CPLD driver in]
This commit is contained in:
Valentine Barshak
2019-04-23 23:44:57 +03:00
committed by Marek Vasut
parent bd13df8b5d
commit ed2f65f010
8 changed files with 370 additions and 0 deletions
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include/configs/v3hsk.h Normal file
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* include/configs/v3hsk.h
* This file is V3HSK board configuration.
*
* Copyright (C) 2019 Renesas Electronics Corporation
* Copyright (C) 2019 Cogent Embedded, Inc.
*/
#ifndef __V3HSK_H
#define __V3HSK_H
#include "rcar-gen3-common.h"
/* Environment compatibility */
/* SH Ether */
#define CFG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x0
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII_ID
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
#endif /* __V3HSK_H */