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* Patch by Leif Lindholm, 23 Sep 2004:

Browse Source 
add support for the AMD db1550 board

* Patch by Travis Sawyer, 15 Sep 2004:
  Add CONFIG_SERIAL_MULTI support for ppc4xx,
  update README.serial_multi
This commit is contained in:
wdenk
2005-01-09 22:28:56 +00:00
parent 6310eb9da7
commit ff36fd8591
14 changed files with 608 additions and 54 deletions
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36
include/asm-mips/au1x00.h
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@@ -132,6 +132,27 @@ static __inline__ int au_ffs(int x)
#define CP0_DEBUG $23
/* SDRAM Controller */
#ifdef CONFIG_AU1550
#define MEM_SDMODE0 0xB4000800
#define MEM_SDMODE1 0xB4000808
#define MEM_SDMODE2 0xB4000810
#define MEM_SDADDR0 0xB4000820
#define MEM_SDADDR1 0xB4000828
#define MEM_SDADDR2 0xB4000830
#define MEM_SDCONFIGA 0xB4000840
#define MEM_SDCONFIGB 0xB4000848
#define MEM_SDPRECMD 0xB40008c0
#define MEM_SDAUTOREF 0xB40008c8
#define MEM_SDWRMD0 0xB4000880
#define MEM_SDWRMD1 0xB4000888
#define MEM_SDWRMD2 0xB4000890
#else /* CONFIG_AU1550 */
#define MEM_SDMODE0 0xB4000000
#define MEM_SDMODE1 0xB4000004
#define MEM_SDMODE2 0xB4000008
@@ -148,6 +169,8 @@ static __inline__ int au_ffs(int x)
#define MEM_SDWRMD1 0xB4000028
#define MEM_SDWRMD2 0xB400002C
#endif /* CONFIG_AU1550 */
#define MEM_SDSLEEP 0xB4000030
#define MEM_SDSMCKE 0xB4000034
@@ -474,6 +497,8 @@ static __inline__ int au_ffs(int x)
#define AU1500_ETH0_BASE 0xB1500000
#define AU1500_ETH1_BASE 0xB1510000
#define AU1100_ETH0_BASE 0xB0500000
#define AU1550_ETH0_BASE 0xB0500000
#define AU1550_ETH1_BASE 0xB0510000
/* 4 byte offsets from AU1000_ETH_BASE */
#define MAC_CONTROL 0x0
@@ -523,6 +548,8 @@ static __inline__ int au_ffs(int x)
#define AU1500_MAC0_ENABLE 0xB1520000
#define AU1500_MAC1_ENABLE 0xB1520004
#define AU1100_MAC0_ENABLE 0xB0520000
#define AU1550_MAC0_ENABLE 0xB0520000
#define AU1550_MAC1_ENABLE 0xB0520004
#define MAC_EN_CLOCK_ENABLE (1<<0)
#define MAC_EN_RESET0 (1<<1)
@@ -979,6 +1006,15 @@ static __inline__ int au_ffs(int x)
#define AC97C_RS (1<<1)
#define AC97C_CE (1<<0)
#define DB1000_BCSR_ADDR 0xAE000000
#define DB1550_BCSR_ADDR 0xAF000000
#ifdef CONFIG_DBAU1550
#define DB1XX0_BCSR_ADDR DB1550_BCSR_ADDR
#else
#define DB1XX0_BCSR_ADDR DB1000_BCSR_ADDR
#endif
#ifdef CONFIG_SOC_AU1500
/* Au1500 PCI Controller */
#define Au1500_CFG_BASE 0xB4005000 /* virtual, kseg0 addr */