Commit Graph

27931 Commits

Author SHA1 Message Date
Dario Binacchi
7ab0ee3a59 board: stm32: add stm32h747-discovery board support
The board includes an STM32H747XI SoC with the following resources:
 - 2 Mbytes Flash
 - 1 Mbyte SRAM
 - LCD-TFT controller
 - MIPI-DSI interface
 - FD-CAN
 - USB 2.0 high-speed/full-speed
 - Ethernet MAC
 - camera interface

Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 12:00:36 -06:00
Dario Binacchi
366f0bfe4f ARM: dts: stm32: add stm32h747i-disco-u-boot DTS file
Add stm32h747i-disco-u-boot DTS file with FMC SDRAM node and its
pinmux settings.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 12:00:36 -06:00
Simeon Marijon
6b9ecdfe9a stm32mp: Add tamp_nvram driver
TAMP backup registers will be exposed as nvmem cells.

Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
exposed as nvmem cells under the nvram node in device tree

Signed-off-by: Simeon Marijon <simeon.marijon@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-06-11 09:42:56 +02:00
Marek Vasut
ecd6fd02e1 ARM: stm32: Auto-detect ROM API table on STM32MP15xx
The ROM API table location is passed to the SPL by BootROM in register r0,
make use of this, store the content of r0 and later use it to access the
ROM API table to determine current boot device.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 09:42:55 +02:00
Marek Vasut
d4972d5b59 ARM: stm32: Fix DBGMCU macro on STM32MP13xx
The DBGMCU block is available at address 0x50081000 both on STM32MP13xx
and on STM32MP15xx . There is no reason to limit the DBGMCU macro being
set only on STM32MP15xx , remove the ifdeffery.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 09:42:55 +02:00
Marek Vasut
380d6f8c19 ARM: stm32: Fix SYSRAM size on STM32MP13xx
The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 .
The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make
sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM
base in stm32.h to be consistent with the STM32MP15xx macro.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 09:42:55 +02:00
Marek Vasut
7df29a172a ARM: stm32: Drop unnecessary space
Drop a space after tab, no functional change.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 09:42:55 +02:00
Patrice Chotard
fddf9886d2 ARM: dts: stm32: switch from fixed to scmi clocks for stm32mp257f-ev1
SCMI clocks are now available, switch from fixed to SCMI clocks.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-06-11 09:42:55 +02:00
Tom Rini
59d00e20fc Merge tag 'v2025.07-rc4' into next
Prepare v2025.07-rc4
2025-06-09 16:28:28 -06:00
Tom Rini
7966c78429 Merge patch series "arm: armv7: fix a bug that prevents CONFIG_BLOBLIST and CONFIG_POSITION_INDEPENDENT to be enabled together"
Yang Xiwen <forbidden405@outlook.com> says:

This patchset also enables CONFIG_POSITION_INDEPENDENT for qemu boards
to avoid similar issues to happen again in the future.

Link: https://lore.kernel.org/r/20250531-pie_blob_fix-v1-0-7b4a37987dbc@outlook.com
2025-06-09 09:18:26 -06:00
Yang Xiwen
0a7610c97a arm: qemu: Add imply CONFIG_POSITION_INDEPENDENT
Add 'imply CONFIG_POSITION_INDEPENTDENT' for QEMU arm arch. This allows
qemu arm boards to load u-boot.bin at any address. It is skipped by
default when u-boot is loaded by either --bios or --kernel.

To load u-boot.bin at a different address, one can use u-boot
chain-loading or qemu loader device[1].

[1] https://www.qemu.org/docs/master/system/generic-loader.html

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2025-06-09 09:18:17 -06:00
Yang Xiwen
03005fbe50 arm: armv7: restore section to .text after saved_args
when CONFIG_BLOBLIST is enabled, the section is switched to .data but is
not switched back to .text. It makes all the code below placed in .data
section, also breaks CONFIG_POSITION_INDEPENDENT.

Fix it by adding `.section .text` to switch the section back to .text.

Fixes: 5103e69344 ("arm: armv7: save boot arguments")
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2025-06-09 09:18:17 -06:00
Yao Zi
6033a66f89 riscv: dts: th1520: Prepare binman configuration for loading OpenSBI
Add an OpenSBI entry to the FIT image. As it expects an FDT to be
passed, corresponding FDT entry is generated with of-list as well.

As SPL now passes a full FDT for following stages, proper U-Boot image
is packed into u-boot-with-spl.bin without a devicetree copy included.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-09 10:44:06 +08:00
Yao Zi
85cfabe895 riscv: cpu: th1520: Support cache enabling/disabling in M mode only
These operations rely on a customized M-mode CSR, MHCR, which isn't
available when running in S mode.

Let's fallback to the generic weak stub when running in S mode to avoid
illegal accesses.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-09 10:44:06 +08:00
Yao Zi
0463545678 riscv: cpu: th1520: Build spl.c for SPL only
Symbols in spl.c only function correctly in SPL stage. Build the file
for SPL only to avoid weak symbols in proper U-Boot being unexpectedly
reloaded.

Fixes: 5fe9ced355 ("riscv: cpu: Add TH1520 CPU support")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-09 10:44:06 +08:00
Tom Rini
e96b6c0c18 Merge patch series "Remove as much arch/arm/dts/*.h as possible"
Tom Rini <trini@konsulko.com> says:

Taking inspiration from Heiko's patch[1] this series goes and cleans up
all of the arch/arm/dts/*.h files that can be easily removed. The big
challenge I ran in to here was that for some platforms that aren't using
OF_UPSTREAM were didn't have a sufficiently deep search path to find
files there rather than arch/arm/dts. This also showed that only ARM had
local header files to deal with.

[1]: https://lore.kernel.org/u-boot/20250528090536.765499-1-heiko.thiery@gmail.com/

Link: https://lore.kernel.org/r/20250528233050.3820722-1-trini@konsulko.com
2025-06-06 13:54:42 -06:00
Tom Rini
e87b5ed9d9 nxp: Remove local arch/arm/dts/imx8mm-pinfunc.h
We have this file in both arch/arm/dts and
dts/upstream/src/arm64/freescale. This file is identical save for
changes which have been made upstream.  Remove our local copy to get in
sync with upstream now.

Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:42 -06:00
Tom Rini
872f69257a atmel: Remove local arch/arm/dts/{sama5d2, sama7g5}-pinfunc.h
We have these files in both arch/arm/dts and
dts/upstream/src/arm/microchip. These files are identical save for
changes which have been made upstream.  Remove our local copy to get in
sync with upstream now.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:42 -06:00
Tom Rini
fefc9329ea arch/arm/dts: Remove strict subset header
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a header that is under the arch/arm/dts directory
and differ in being a strict subset of what is found upstream. We can
remove this now to prevent future conflicts.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:42 -06:00
Tom Rini
96d95e6a53 arch/arm/dts: Remove functionally identical headers
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a number of these headers that are under the
arch/arm/dts directory and differ only in combinations of spacing
changes and/or switching to SPDX license tags. We can remove these now
to prevent future conflicts.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:42 -06:00
Tom Rini
7e97877440 arch/arm/dts: Remove identical headers
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a number of these headers that are under the
arch/arm/dts directory and are currently identical to the versions in
dts/upstream.  We can remove these now to prevent future conflicts.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:41 -06:00
Tom Rini
96e8ce71e9 arch/arm/dts: Remove unused header
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a header that is under the arch/arm/dts directory
and now unused. We can remove this now to prevent any future conflicts.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-06 13:54:41 -06:00
Justin Klaassen
210ab4f60d rockchip: rk3399-nanopi-4: Enable IO-domain driver in SPL
The NanoPi RK3399 boards support UHS-I (up to SDR104) SD cards, however
using any of these 1.8v modes results in a boot failure in SPL upon soft
reboot.

The issue is that the "vcc_sdio" regulator is left at 1.8v on reboot
and the corresponding GPIO defaults to 3.3v. This prevents the SD card
from being reinitialized and read successfully.

This change enables the RK8XX regulators and Rockchip IO-domain drivers
in SPL, which initializes "vcc_sdio" regulator to 3.0v and configures
the GPIO for the correct level on boot.

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:21:54 +08:00
Justin Klaassen
2abd7fff9e rockchip: rk3399-nanopi-4: Allow MMC driver to control SD regulators
This change removes the "regulator-always-on" property from the
"vcc3v0_sd" (vmmc-supply) and "vcc_sdio" (vqmmc-supply) regulators,
which otherwise prevents the MMC driver from being able to power cycle
the SD card as part of the initialization procedure.

It also removes the "regulator-boot-on" from the "vcc_sdio" regulator,
which could theoretically damage a SD card that is already initialized
in a low voltage mode.

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:21:54 +08:00
Lukasz Czechowski
ac86ee45ee rockchip: px30: Fix hard dependency to DEBUG_UART_BOARD_INIT
Because DEBUG_UART_BOARD_INIT depends on DEBUG_UART, hard dependency
to DEBUG_UART_BOARD_INIT in ROCKCHIP_PX30 can cause warnings if
DEBUG_UART is disabled.
The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP entry.
Remove hard dependency from ROCKCHIP_PX30, so that it will be
consistent with other rockchip boards.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:12:20 +08:00
Lukasz Czechowski
80bac23430 rockchip: px30: Weaken dependency TPL/SPL serial
Allow to disable serial console in TPL and SPL. Weak dependency
to SPL_SERIAL and TPL_SERIAL is also used in other Rockchip boards.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>

Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:12:20 +08:00
Lukasz Czechowski
79d9ac8b13 arm: uniphier: Change _debug_uart_putc function to inline
Update the definition of _debug_uart_putc to static inline.
This matches the instructions in include/debug_uart.h and
provides consistency with implementations for other platforms.

Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:12:20 +08:00
Heiko Thiery
a822b95da4 arm: dts: remove k3-serdes.h
This file is a duplicate and also comes with the sync of the linux
mainline dts files. By removing this the one from the dts folder should
be taken that is more up-to-date.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2025-06-05 16:57:35 -06:00
Raymond Mao
85683bd195 armv8: fix Clang warning on writing 32-bit variable to a 64-bit register
Clang is stricter than GCC when it comes to inline assembly and expects the
register to be written with explicitly same type of variable.

Fixes: c0e1775a86 ("armv8: Add arch-specific sysinfo platform driver")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-05 16:57:35 -06:00
Anshul Dalal
27cd65ca1b mach-k3: am62ax: enable caches for the SPL stage
board_init_f for the am62a is missing the call to spl_enable_cache which
exists for all other am62 platforms (check am625_init.c &
am62p5_init.c).

This allows the usage of caches while loading and parsing the u-boot.img
FIT resulting in ~2x speedup in the A53 SPL stage.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
2025-06-04 12:27:57 -06:00
Emanuele Ghidoli
422222f517 linux/sizes.h: sync from kernel
The kernel added new size definitions and substituted the
boilerplate/reference to the license with a SPDX identifier.

Drop a local SZ_8G definition in MediaTek MT7988 SoC board file.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2025-06-03 17:18:03 -06:00
Parth Pancholi
b8c43968b8 board: toradex: add verdin am62p support
This adds initial support for the Toradex Verdin AM62P module.

The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.

These specific changes adds support for Toradex Verdin AM62P Quad 2GB WB
IT module.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
2025-06-03 17:18:03 -06:00
Tom Rini
fdc0dcbb2c Merge tag 'qcom-more-for-2025.07' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
More Qualcomm fixes for 2025.07

* Adjust fdtfile logic to support more boards
* Support linux,code variable in qcom-pmic button driver
* Minor CLK API adjustments and apq8096/msm8916 fixes
* vbus regulator register fixes
* dragonboard410c KASLR support and other fixes
2025-06-03 09:00:52 -06:00
Tom Rini
d786c6b69f Merge patch series "Audit include list for include/[a-m]*.h"
Tom Rini <trini@konsulko.com> says:

Hey all,

Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.

Link: https://lore.kernel.org/r/20250521230119.2084088-1-trini@konsulko.com
2025-06-02 17:43:56 -06:00
Tom Rini
824f8f52a1 global: Cleanup usage of "ETH_ALEN"
The value of "ETH_ALEN" is defined to 6 in <linux/if_ether.h>. This file
is included in <net.h>. In the places where we had ETH_ALEN but no
direct include of <net.h>, add <linux/if_ether.h>. In the places where
we had a custom name used, make use of ETH_ALEN instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
2266595bf8 include/mtd.h: Cleanup usage
There are only a few things found in <mtd.h> today. Go through and audit
the C files which include <mtd.h> and remove it when not required. Then,
add it to the files which had either missed it or had an indirect
inclusion of it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
2cf46de9b6 include/mmc.h: Audit include list
This file does not need <linux/sizes.h> nor <linux/compiler.h> so remove
them. This exposes however that a number of other files had been relying
on this implicit include for <linux/sizes.h> so add that where needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
377c75f8c5 include/bios_emul.h: Audit include list
This file does not need <pc.h> but does directly need
<linux/types.h>. Furthermore, arch/x86/lib/bios.c was getting <pci.h>
via <bios_emul.h> so add it there.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Marek Vasut
52caad0d14 ARM: Align image end to 8 bytes to fit DT alignment
Align U-Boot image end to 8 bytes to make sure DT alignment requirement
is fulfilled. This fixes a possible failure in fdt_find_separate() in
case the U-Boot image is aligned to 4 Bytes and DT is appended at the
end at already 8 Byte aligned offset.

Link: https://source.denx.de/u-boot/u-boot/-/issues/30
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-06-02 17:25:35 -06:00
Patrick Rudolph
d1555de5fa arm/dts/qemu-sbsa: Fix interrupt
Change the vcpumntirq in the GICv3 node from SPI to PPI.

Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'

Fixes: 6d722894fd "board: emulation: Add QEMU sbsa support"

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2025-06-02 14:58:46 -06:00
Sumit Garg
14315b73a8 mach-snapdragon: Update fdtfile logic to work for RB1 and RB2
RB1 and RB2 have three root compatibles where the last one can't be used
to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first
compatible to retrieve the SoC name.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250505124333.12344-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:40 +02:00
Mayuresh Chitale
29a2025d77 Revert "riscv: Select appropriate image type"
This reverts commit 027a316828 as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02 16:17:55 +08:00
Mayuresh Chitale
04fcd9a56b Revert "booti/bootm: riscv: Verify image arch type"
This reverts commit 37b0b22d8b as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02 16:17:21 +08:00
Tim Harvey
37195f8413 imx8mp-venice-gw74xx: add w_disable2 gpio configuration
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.

Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tim Harvey
9eebca1025 board: venice: add imx8mp-gw82xx support
The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
baseboard featuring:
 - i.MX8M Plus SoC
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller (GSC)
 - microSD (1.8V/3.3V Capable)
 - panel status bi-color LED
 - pushbutton switch
 - fan controller with tachometer
 - USB Type-C connector
 - PCIe switch
 - 2x GbE RJ45 connectors
 - multi-protocol RS232/RS485/RS422 Serial ports
 - 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
   (for M.2 and miniPCIe expansion)
 - 2x isolated CAN
 - GPS
 - accelerometer
 - magnetometer
 - off-board connectors for: SPI, GPIO, I2C, ADC
 - Wide range DC power input
 - support for 802.3at PoE (via adapter)

Add support for it by providing its device-tree.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-30 19:10:56 -03:00
Tom Rini
2ab0f0d058 Merge patch series "Almost complete DM_SERIAL migration"
Tom Rini <trini@konsulko.com> says:

In a private thread, Simon asked about what's needed to get PowerPC
migrated to DM_SERIAL. I went and took a look, and to complete the
entire DM_SERIAL migration (excluding SPL/TPL) we're actually nearly
there. This series first migrates PowerPC (and some NXP Layerscape
boards that share history more clearly with PowerPC parts), with the
biggest change being to make sure we still use the correct legacy
drivers in SPL/TPL (where SPL is extremely constrained). With that out
of the way, I looked at what was left. With two exceptions, it's
platforms which can be trivially enabled for conversion, and so we do
that.

Link: https://lore.kernel.org/r/20250502201226.1369013-1-trini@konsulko.com
2025-05-30 10:17:40 -06:00
Tom Rini
191b10ac70 PowerPC / Layerscape: Finish migration to DM_SERIAL
Migrate the few ARM Layerscape platforms that had not been switched
along with all remaining PowerPC platforms to DM_SERIAL. For PowerPC,
this means that platforms which use SPL/TPL, keeping the non-DM serial
driver enabled there as they do not use DM. We also rework the guards
on how to define CFG_SYS_NS16550_CLK so that this is mostly in one place
now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-30 10:16:51 -06:00
Tom Rini
1481ae5d5a Merge patch series "Remove clocks from R5 dtsi for missed boards."
Manorit Chawdhry <m-chawdhry@ti.com> says:

Fix some of the boards that could be affected by the change done in [0].

[0]: https://lore.kernel.org/u-boot/20241121-b4-upstream-pll-fix-v1-0-904f618897a7@ti.com/T/#mecb70b415a364fdf322a94241438db7b5607e92b
Link: https://lore.kernel.org/r/20250515-b4-upstream-k3-pll-miss-v1-0-e38b89f027b8@ti.com
2025-05-29 08:33:17 -06:00
Manorit Chawdhry
8668c6a3bd arm: dts: k3-am62a7-phycore-r5*: Remove clocks from main_timer0
The commit 79d91e77f4 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.

Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.

Fixes: 5d1aac358f ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Wadim Egorov <w.egorov@phytec.de>
2025-05-29 08:33:11 -06:00
Manorit Chawdhry
2696d3baea arm: dts: k3-am625-verdin-r5*: Remove clocks from main_timer0
The commit 79d91e77f4 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.

Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.

Fixes: 5d1aac358f ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2025-05-29 08:33:11 -06:00