Commit Graph

28303 Commits

Author SHA1 Message Date
Tom Rini
56905deb20 Merge branch 'master' of git://source.denx.de/u-boot-usb
- dwc3 memory leak fixes
2026-04-17 10:12:44 -06:00
Gurumoorthy Santhakumar
884b10e86a usb: dwc3: core: fix memory leaks in event buffer cleanup
In dwc3_free_one_event_buffer(), only the DMA buffer (evt->buf) was
being freed via dma_free_coherent(), but the evt structure itself was
never explicitly freed, causing a memory leak.

In dwc3_free_event_buffers(), the ev_buffs pointer array allocated
with memalign() was never freed after iterating and releasing all
individual event buffers, causing another memory leak.

Fix both leaks by freeing the evt struct in
dwc3_free_one_event_buffer() and freeing dwc->ev_buffs in
dwc3_free_event_buffers() after all entries have been released.

Signed-off-by: Gurumoorthy Santhakumar <gurumoorthy.santhakumar@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-04-17 15:57:19 +02:00
David Lechner
bc6c4ee8d4 mtd: spi-nor-ids: add flags for mx25u12835f
Add some capability flags for mx25u12835f.

In particular, we are interested in using the lock feature. According to
the datasheet, dual/quad read is also supported.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-15 14:45:18 -06:00
Tom Rini
301d2d3273 spi: Correct dependencies for SPI_FLASH_SST
The SPI_FLASH_SST functionality is a subset of SPI_FLASH_LOCK today, so
express this dependency in Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Flaviu Nistor
3ee5a4c599 mtd: spi-nor: Add is25wx128 and is25lx128 chips
Add is25wx128 and is25lx128 ISSI chips to
spi-nor id table.
Both chips have a size of 16MB but is25wx128
is the 1.8V version and is25lx128 is the 3v
version.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Chen Huei Lok
3e33474a0c mtd: spi-nor-ids: Add support for IS25WP01GG SPI NOR flash
Add a new entry for the IS25WP01GG SPI NOR flash (ID 0x9d7021,
64KB sectors, 2KB page size) with 4K sectors, dual and quad read
support. This flash is used and tested on N5X boards.

Datasheet :
https://www.issi.com/WW/pdf/25LP-WP01GG.pdf

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 14:45:18 -06:00
Flaviu Nistor
3009978976 mtd: spi-nor: Add gd25lx128j chip
Add gd25lx128j GIGADEVICE chip to spi-nor id table.

Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
2026-04-15 14:45:18 -06:00
Jeffrey Yu
3d623b9d39 mtd: spi-nor: ids: add ISSI IS25LP*J/*MJ/*E and IS25WP*J/*MJ device IDs
Add JEDEC ID table entries for additional ISSI SPI-NOR devices.

These parts previously not yet supported.
With these entries, U-Boot can match the device by JEDEC ID
and use the existing ISSI SPI-NOR device handling.

Newly added devices include:
  - IS25LP512MJ  (JEDEC 0x9d6020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25WP512MJ  (JEDEC 0x9d7020)
    https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
  - IS25LP010E   (JEDEC 0x9d4011)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP020E   (JEDEC 0x9d4012)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP040E   (JEDEC 0x9d4013)
    https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
  - IS25LP01GJ   (JEDEC 0x9d6021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25LP02GG   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25LP02GJ   (JEDEC 0x9d6022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf
  - IS25WP01GG   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GG.pdf
  - IS25WP01GJ   (JEDEC 0x9d7021)
    https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
  - IS25WJ128F   (JEDEC 0x9d7118)
    https://www.issi.com/WW/pdf/25WJ128F.pdf
  - IS25WP02GG   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
  - IS25WP02GJ   (JEDEC 0x9d7022)
    https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf

Signed-off-by: jeffrey yu <jeyu@issi.com>
[trini: Fix spacing issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 14:45:18 -06:00
Chen Huei Lok
39d1a96d71 spi: cadence_xspi: enable automatic platform data allocation
Enable automatic allocation of platform data for the Cadence XSPI
controller by setting .plat_auto.

Without this, dev_get_plat() may return invalid or uninitialized
platform data when multiple XSPI controllers are present, leading
to incorrect IOBASE/SDMABASE/AUXBASE values and causing SPI flash
probe failures.

Setting .plat_auto ensures each controller instance receives a
properly sized cdns_xspi_plat structure, allowing SF probe to work
correctly.

Tested on an Altera Simics platform with multiple XSPI controllers.

Signed-off-by: Chen Huei Lok <chen.huei.lok@altera.com>
2026-04-15 13:36:44 -06:00
Ssunk
c56db9b4a4 mtd: spi-nor: Add Dosilicon DS25M/Q series support
Add support for dosilicon ds25m4cb, ds25m4dn, ds25q4cb, ds25q4dn

Datasheets:
ds25m4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4CB-XXXXX_Rev04.pdf
ds25m4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4DN-XXXXX_Rev03.pdf
ds25q4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4CB-XXXXX_Rev03.pdf
ds25q4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4DN-XXXXX_Rev01.pdf

Signed-off-by: Ssunk <ssunkkan@gmail.com>
[trini: Adjust spacing]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-15 13:36:43 -06:00
Ssunk
fba2419269 mtd: spi: spi-nor-ids: Add support for XMC XM25QH01D
Add support for XMC XM25QH01D SPI NOR flash.

Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf
Link: https://lore.kernel.org/u-boot/20250827105854.10746-1-ssunkkan@gmail.com/
2026-04-15 10:36:15 -06:00
Ssunk
b6dbbfa71e mtd: spi-nor: ids: Add support for Puyasemi flash chips
Add JEDEC IDs for Puyasemi PY25F512HB, PY25F01GHB, PY25F512LC,
and PY25F01GLC flash parts.

Datasheets:
PY25F512HB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F512HB_Datasheet_V1.2.pdf
PY25F01GHB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F01GHB_Datasheet_V1.1.pdf
PY25F512LC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512LC_Datasheet_V1.3.pdf
PY25F01GLC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F01GLC_Datasheet_V1.0.pdf

Reviewed-by: Anshul Dalal <anshuld@ti.com>
Signed-off-by: Ssunk <ssunkkan@gmail.com>
2026-04-15 10:35:58 -06:00
Tom Rini
8f6a5932aa Merge patch series "serial: goldfish: Add debug uart support"
This series from Daniel Palmer <daniel@0x0f.com> improves debug UART
support on QEMU on M68K by adding debug uart support to the serial
driver.

Link: https://lore.kernel.org/r/20260309105110.672832-1-daniel@0x0f.com
2026-04-14 13:25:32 -06:00
Daniel Palmer
cbfb9b3f22 serial: goldfish: Add debug uart support
Add debug support for the goldfish tty so it can be used for
early debugging. This will be really useful when adding support
for relocation to the m68k qemu virt machine.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Tested-by: Kuan-Wei Chiu <visitorckw@gmail.com>
2026-04-14 13:25:13 -06:00
Javier Viguera
c8afe949d3 rtc: rv3028: fix PORF flag not being cleared
The current code sets RV3028_STATUS_PORF instead of clearing it, so the
flag remains asserted. Use dm_i2c_reg_clrset() to clear the bit.

Signed-off-by: Javier Viguera <javier.viguera@digi.com>
2026-04-13 15:24:24 -06:00
Tom Rini
e2fa3e570f Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Assorted fixes and tweaks, HUSH parser, preboot env variable, SMC
command enablement, s_init and 32bit/64bit code clean up, DBSC and APMU
remoteproc clean ups, UFS dev_phys_to_bus() remap support and SCIF R-Car
Gen5 support.
2026-04-09 16:34:38 -06:00
Tom Rini
ca17943235 Merge tag 'fsl-qoriq-for-2026.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29808

- Add env variables to assist boot for various LS boards
- Add gpio scmi driver
- Fix setting the function for scmi pinctrl
- Use standard device tree pin muxing format for scmi pinctrl
- Fix protocol version fetch for non-CCF platforms in scmi clk
2026-04-09 12:17:28 -06:00
Ioana Ciornei
f0dbde4675 drivers: net: fsl-mc: add the nowait option when applying the DPL
The process through which the MC firmware parses the DPL and initializes
all the requested DPAA2 objects is a complex one which can take quite a
bit of time. For the those circumstances in which a fast boot is
required on DPAA2 based SoCs, add the 'nowait' optional parameter for
the fsl_mc [lazy]apply dpl command.

When this option is used, the Linux kernel fsl-mc bus must wait for
the firmware to finish parsing the DPL before proceeding with probing
all the DPAA2 objects.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Ioana Ciornei
d3c0f53d65 drivers: net: fsl-mc: cleanup the fsl_mc command help text
All the parameters that can be currently passed to the fsl_mc command
are positional arguments which are mandatory. This is not perfectly
clear when reading the help text because of the use of square brackets.

Fix this by changing the square brackets, which are commonly used for
optional parameters, with < .. >.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Ioana Ciornei
d6e73ce02e drivers: net: fsl-mc: remove unused parameter from the wait_for_mc() function
The first parameter of the wait_for_mc() function - booting_mc - is not
used. Remove it.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Dan Carpenter
a2536daf93 pinctrl: scmi: Use standard device tree pin muxing format
In the original code, I wrote a custom pin muxing parser but the
upstream device trees wouldn't accept something like that so it would
have complicated mergine the device tree files.

Use the standard device tree format with function and groups:

	pinmux1: pinmux1 {
		function = "f_gpio1";
		groups = "grp_1", "grp_3";
	};

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:17:28 -06:00
Dan Carpenter
3a29dfc92e firmware: scmi: Fix setting the function
Set BIT(10) when the function needs to be set, otherwise the setting is
ignored.

Fixes: 0cb160f1b6 ("scmi: pinctrl: add pinctrl driver for SCMI")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 12:16:58 -06:00
Dan Carpenter
af7b6bb05a gpio: scmi: Add gpio_scmi driver
This provides GPIO support over SCMI.  It is built on top of the
pinctrl-scmi driver.  A typical device tree entry might look like
this:

    gpio1 {
        compatible = "scmi-pinctrl-gpio";
        gpio-controller;
        #gpio-cells = <2>;
        ngpios = <10>;
        gpio-ranges = <&scmi_pinctrl 0 8 4>,
                      <&scmi_pinctrl 4 12 1>,
                      <&scmi_pinctrl 5 15 1>,
                      <&scmi_pinctrl 6 17 4>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins>;
    };

In this GPIO driver the one thing which is different is that in the
gpio-ranges the first numbers which represent how the pins are exposed
to the users have to start at zero and it can't have gaps.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 10:14:39 +08:00
Kamlesh Gurudasani
d113b29523 clk: scmi: Fix protocol version fetch for non-CCF platforms
The SCMI clock protocol version was only being fetched when CLK_CCF
was enabled. On non-CCF platforms, the probe function returned early
without fetching the version, leaving priv->version as 0.

This caused issues because code paths like scmi_clk_gate() and
scmi_clk_get_permissions() depend on priv->version to determine
which protocol message format to use, even in non-CCF mode.

Fix this by moving the scmi_generic_protocol_version() call before
the CLK_CCF check, ensuring the version is fetched for both CCF and
non-CCF platforms.

Tested on am62lx_evm.

Fixes: ae7e0330ce ("clk: scmi: add compatibility with clock protocol 2.0")
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-04-09 10:14:19 +08:00
Marek Vasut
4a95a2a9e1 ufs: Remap CPU to bus addresses using dev_phys_to_bus()
Use dev_phys_to_bus() to convert CPU addresses of DMA descriptors
into bus addresses of DMA descriptors. This is necessary on hardware
which does not have 1:1 mapping between CPU and memory addressed by
the DMA. This has no impact on other hardware which does not need
this conversion.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:53:44 +02:00
Marek Vasut
d3c7fb5eb9 serial: sh: Handle HSCIF on all 64-bit R-Car SoC
The HSCIF variant present on Renesas R-Car Gen5 SoC is compatible
with the HSCIF variant present on Renesas R-Car Gen4 SoC. Enable
HSSRR register programming for HSCIF present on all 64-bit R-Car
SoCs, which covers R-Car Gen3, Gen4 and newly also Gen5.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-08 19:36:28 +02:00
Marek Vasut
cc417680dc remoteproc: renesas: apmu: Fix typo in Kconfig symbol help text
Fix typo in Kconfig symbol help text, change incorrect A52 to correct R52.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
2026-04-08 19:36:28 +02:00
Tom Rini
f0000b4a57 Merge patch series "env: scsi: support SCSI env without partition UUID"
David Lechner <dlechner@baylibre.com> says:

This is a series adding support for reading U-Boot env directly from
SCSI devices that do not have a partition table, similar to how we can
already do this for MMC devices.

The motivation behind this is that MediaTek's BSP is already using the
same disk images for both MMC and UFS devices, so we need to be able to
read the env from SCSI devices without requiring a partition UUID.

The series starts with cleaning up a few oddities we noticed in the
existing code. Then some refactoring so that the env code manages
calling scsi_scan() so that we don't have to duplicate that for the
new code path. Then finally, the last few patches add and document the
new functionality.

Link: https://lore.kernel.org/r/20260326-env-scsi-hw-part-support-v1-0-55c9dd07a2cb@baylibre.com
2026-04-08 11:07:19 -06:00
David Lechner
b382cd0973 scsi: move scsi_scan() call out of scsi_get_blk_by_uuid()
Move scsi_scan() call out of scsi_get_blk_by_uuid().

The only caller, env_scsi_get_part(), should be managing this call since
it may also want to use different ways to get the partition information
in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
David Lechner
e5d8ad260b scsi: return ENODEV in scsi_get_blk_by_uuid()
Change scsi_get_blk_by_uuid() to return -ENODEV instead of -1 on error.
Other scsi_* functions return an error code rather than -1.

1 is EPERM, which doesn't make sense here. So we use ENODEV instead. The
only caller only checks for !success, so changing the value has no
effect on the caller.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-08 11:07:07 -06:00
Marek Vasut
a383c96892 dm: Respect dma-ranges size
Rework dev_phys_to_bus() and dev_bus_to_phys() to respect the size
of the area specified in dma-ranges DT property. The area outside
of ranges is remapped 1:1, while the area in the ranges is remapped
according to the description in the dma-ranges property.

Adjust the test to test the area within the remapped range, not area
outside the remapped range, which was incorrect.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
2026-04-07 15:27:22 -06:00
Tom Rini
0a7e2a90ad Merge tag 'mediatek-for-master-2026-04-07' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
This is the first wave of MediaTek changes for this merge window. We
also expect to be sending another decent-sized pull request later for
the backlog of patches that are currently waiting on dependencies or
need little more time for review.

* Fixes for cargo-culted issues in mach-mediatek init.c files.
* Some consistency cleanups of recently added Genio boards (510/700/1200).
* Some pinctrl improvements to support newer MediaTek SOCs (mt8189 compatible).
* New devicetree and config for Genio 520/720 EVK boards (can boot to eMMC or SD).
* New CPU-specific functions to read vendor-specific CPU info at runtime.
2026-04-07 13:52:01 -06:00
Philip Molloy
c98bf0533b arm: mach-sc5xx: Align header paths with SYS_SOC convention
Define CONFIG_SYS_SOC in the mach-sc5xx Kconfig. Follow the standard
U-Boot include path convention by moving the SC5xx SoC headers from
arch/arm/include/asm/arch-adi/sc5xx/ to the conventional
arch/arm/include/asm/arch-sc5xx/ location. Update includes from
<asm/arch-adi/sc5xx/*.h> to <asm/arch/*.h> across mach-sc5xx and board
files.

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
2026-04-07 11:32:59 -06:00
Tom Rini
8c212d6e2e global: Correct duplicate U_BOOT_DRIVER entry names
The U_BOOT_DRIVER macro creates a list of drivers used at link time, and
all entries here must be unique. This in turn means that all entries in
the code should also be unique in order to not lead to build failures
later with unexpected build combinations. Typically, the problem we have
here is when a driver is obviously based on another driver and didn't
update this particular field and so while the name field reflects
something unique the linker entry itself is not. In a few places this
provides a more suitable string name as well, however.

Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # Tegra
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:56 -06:00
Tom Rini
3fe899fbea serial: omap: Fix "unused" warnings with SERIAL_PRESENT=n and OF_REAL=y
The definition of our ID table (and of_to_plat function) is guarded with
OF_REAL however the U_BOOT_DRIVER that would in turn use the table is
guarded with SERIAL_PRESENT. To avoid a potential warning we must also
guard both with SERIAL_PRESENT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:49 -06:00
Tom Rini
25d55485db serial: ns16550: Fix an "unused" warning with SERIAL_PRESENT=n and OF_REAL=y
The definition of our ID table is guarded with OF_REAL however the
U_BOOT_DRIVER that would in turn use the table is guarded with
SERIAL_PRESENT. To avoid a potential warning we must also guard the
ID table with SERIAL_PRESENT.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:46 -06:00
Tom Rini
ff031c3421 input: Correct dependencies for CROS_EC_KEYB
The CROS_EC_KEYB functionality can only work with CROS_EC enabled, so
express this dependency in Kconfig, for all build phases.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-07 11:32:43 -06:00
David Lechner
04b3a834c6 clk: mediatek: mt8189: add some VLP clocks
Add some VLP clocks needed by the PMIC on MT8189 and similar SoCs.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260323-mtk-mt8391-initial-support-v3-1-19dd92f4543f@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:56:23 -05:00
David Lechner
29739f15c0 pinctrl: mediatek: mtk8189: set get_pinconf functions
Set the get_pinconf functions for the mt8189 pinctrl driver. This will
append pinconf bias info to the output of the pinmux status command.
This is useful for debugging pin configuration issues.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-4-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
76da7482cf pinctrl: mediatek: print bias info along with pinmux
Add functionality to be able to print pin bias settings along with the
pinmux setting.

This can be useful to debug why pins might not be working correctly.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-3-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
108e752b2a pinctrl: mediatek: mt8189: fix pinconf bias
Fix setting pinconf bias for MT8189.

Using mtk_pinconf_bias_set_v1() was wrong because MT8189 does not have
PULLEN/PULLSEL registers. It has PU and PD registers for most pins.
MSDC pins need special handling since they have PUPD/R1/R0 registers.
I2C pins need special handling since they have PU/PD/RSEL registers.
New groups are added for MSDC and I2C pins and the bias_set callback
is now set appropriately for all groups.

A new table is needed for the RSEL registers since those were missing.

Some new macros are introduced to avoid repeating the same info many
times in MTK_TYPED_PIN(). This also fixes the semantically incorrect
use of DRV_GRPX for the IO_TYPE_GRPX field.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-2-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
David Lechner
937884083e pinctrl: mediatek: add handling for RSEL register
Add a new PINCTRL_PIN_REG_RSEL register type and a new function
mtk_pinconf_bias_set_pu_pd_rsel() to handle setting it.

Some MediaTek SoCs have a pin configuration register called RSEL that
sets the resistance value for bias pullup/pulldown.

Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-1-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-07 10:47:04 -05:00
Tom Rini
93f84ee022 Merge branch 'next' 2026-04-06 12:16:57 -06:00
Marek Vasut
e7b5aee706 net: rswitch: Avoid NULL pointer dereference during PHY access
At the very early stage when PHY ID is being auto-detected, the
PHY device is not yet instantiated and rswitch_etha .phydev is
still NULL. Add missing check for this condition and perform C22
fallback access in this PHY ID auto-detection case.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-04-04 23:46:31 +02:00
Prasanth Babu Mantena
214aababe0 Revert "usb: cdns3: use VBUS Valid to determine role for dr_mode OTG"
While USB DFU boot works with this patch, but the non USB boot modes like
SD Boot and flash boot fails for J784S4 EVM device.

So, Reverting this patch.

This reverts commit bfb530e06c.

Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
2026-04-03 17:50:16 -06:00
Tom Rini
7b53fbb274 spi: Correct dependency on SPI_MEM for many drivers
A large number of drivers "depends on" SPI_MEM but this is library type
functionality and so must be select'd instead in order to ensure that
drivers will build. Correct this usage and hide the symbol normally.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
a05d59a1cf misc: Add missing dependency to CROS_EC_SANDBOX
In order to build CROS_EC_SANDBOX we must also have the hashing API
enabled, add that as a dependency.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
56b896511c gpio: Correct dependencies for legacy CMD_PCA953X
The legacy CMD_PCA953X command can only be built when the matching
legacy driver is enabled, add that dependency to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:50 -06:00
Tom Rini
2e676dbf07 clk: Add missing dependency for SANDBOX_CLK_CCF
In order to build SANDBOX_CLK_CCF we need for CLK_CCF to be enabled, add
that as a select similar to other drivers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 13:42:49 -06:00
Tom Rini
99bc9d07b7 rtc: Update Kconfig dependencies
Update the dependencies for RTC drivers which did not express a
requirement on DM_RTC, or in some cases on DM_RTC being disabled. In a
few cases, when DM_RTC is disabled we also require DM_I2C to also be
disabled or for POWER_LEGACY to be enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-04-03 12:06:27 -06:00