Commit Graph

102426 Commits

Author SHA1 Message Date
Tom Rini
c39a8001ca ram: Tighten some ram driver dependencies
A few ram drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:04:25 -06:00
Tom Rini
546be69f05 serial: linflexuart: Remove unused driver
This driver is unused. Remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:03:12 -06:00
Tom Rini
37f0a8b8cb serial: Tighten some serial driver dependencies
A few serial drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:03:09 -06:00
Tom Rini
91122ea8f0 rtc: pl031: Correct function type of pl031_write_reg
When calling writel we do not have a return value to check or pass
along. This function should therefore be void and not return what writel
gives us.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:03:05 -06:00
Tom Rini
d7daa9274b rtc: mc146818: Fix building on more architectures
This driver makes calls to in8/out8(). On PowerPC these are separate and
real calls but elsewhere they are able to simply be wrappers to
inb/outb. Rework this logic to be able to build this driver on more
platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:03:03 -06:00
Tom Rini
b86ace06d3 rtc: Tighten some rtc driver dependencies
The Marvell RTC rtc driver cannot build without access to some
platform specific header files. Express that requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 11:02:58 -06:00
Tom Rini
38931172ed sysreset: Tighten some sysreset driver dependencies
The MPC83xx sysreset driver cannot build without access to some
architecture specific header files. Express that requirements in Kconfig
as well.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:35 -06:00
Tom Rini
8b0eac68e5 sound: Tighten some sound driver dependencies
A few sound drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:19 -06:00
Tom Rini
01bc65a0e9 soc: Tighten some soc driver dependencies
The Qualcomm Snapdragon "SoC" driver cannot build without access to some
ARM64 specific functionality. Express that requirements in Kconfig as
well.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:16 -06:00
Tom Rini
548ae9d1a5 remoteproc: Tighten some remoteproc driver dependencies
The TI IPU remoteproc driver cannot build without access to some
platform specific header files. Express that requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:12 -06:00
Tom Rini
0ae7725e87 reset: Tighten some reset driver dependencies
A few reset drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:09 -06:00
Tom Rini
00ad9ed4a7 pwm: pwm-aspeed: Add missing <linux/log2.h> to pwm-aspeed.c
This driver references the logarithmic macros while relying on an
indirection inclusion of <linux/log2.h>. Add the missing include
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:05 -06:00
Tom Rini
678be99d56 pwm: Tighten some pwm driver dependencies
A few pwm drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:59:05 -06:00
Tom Rini
e7a95ee2b5 pinctrl: Tighten some pinctrl driver dependencies
A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:58:48 -06:00
Tom Rini
e2837ecddc sm: Rework the Kconfig logic here
The symbol "SM" is a library symbol and should not be prompted for. It
should be selected by the drivers that use it. In this case we need to
add a SANDBOX_SM symbol for the sandbox driver. The meson SM driver
cannot build on other platforms, so add the appropriate dependency.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:58:46 -06:00
Tom Rini
d68db76b95 sandbox: Add an additional dummy sync macro
There are some drivers which call a "dmb" for a type of sync. Add that
as well to sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 10:58:43 -06:00
Andrew Goodbody
4266b8a283 net: e1000: Free temporary buffer on exit
In do_e1000_spi_checksum a temporary buffer is allocated but never
freed. Add code to free on exit. Also refactor the code to make the exit
code common.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-08-14 10:58:40 -06:00
Martin Schwan
0c558bbad9 bootstd: rauc: Change global method to check any partition
The bootmeth rauc should scan all partitions, in particular whole
devices, and not be a global method. There may exist multiple RAUC
systems on different devices and they should all be detected. This also
fixes a bug, where both a global bootflow and one using an actual,
complete device would be detected at the same time, when scanning for
valid bootflows.

Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2025-08-14 09:18:43 -06:00
Tom Rini
6531aeed37 env: Correct Kconfig type for ENV_MMC_SW_PARTITION
As part of renaming environment related Kconfig options,
ENV_MMC_SW_PARTITION was inadvertently changed from a string to a bool.
Correct this.

Fixes: ffc4914703 ("env: Rename ENV_MMC_PARTITION to ENV_MMC_SW_PARTITION")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-14 09:17:02 -06:00
Tom Rini
5e2ade730a Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/27379

- Board: mbv: Prepare MBV for CI
- Board: MPFS Icicle Kit cleanup
- Board: Add Andes Voyager board support
- RISCV: Update SYS_BOOTM_LEN to commonly used value
- starfive: fix return code of `mac write_eeprom`
- arch/riscv/lib: update memmove and memcpy for big-endian
2025-08-14 08:51:42 -06:00
Ben Dooks
35d6caad6d arch/riscv/lib: update memmove and memcpy for big-endian
Change the shift patterns for the unaligned memory move and copy code
to deal with big-endian by definign macros to change the shfit left and
right to go the opposite way.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Heinrich Schuchardt
909ceacf4a starfive: fix return code of mac write_eeprom
When writing the EEPROM fails, the command usage help text is displayed
after the error message. We should only display the error message instead.

If writing the EEPROM fails, return CMD_RET_FAILURE (1) instead of
CMD_RET_USAGE (-1).

Fixes: aea1bd95b6 ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: E Shattow <e@freeshell.de>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
3856d93ea3 board: MAINTAINERS: Add Voyager board maintainer
Add Voyager board maintainer.

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
2da685378f doc: board: voyager: Add documentation for Voyager
Add documentation for Voyager board.

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
3239ef494c configs: andes: add Voyager board defconfig
Add default configuration file for Voyager board.

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
35995f7ebf board: andestech: Add Voyager board support
Introduce Voyager board specific code, including
- dram info
- shared cache enabling

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
a25e1aacdb riscv: dts: andes: Add Voyager device tree
Introduce the initial device tree support for Andes Voyager board.
We will convert to OF_UPSTREAM once the patch series for kernel is merged.

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
87f98d9225 riscv: board: Add Andes Voyager board Kconfig support
The Voyager is Andes' first RISC-V development board.
It is built around Qilai SoC,
which includes Andes AX45MP quad-core cluster.

Introduce the Kconfig entry for the Voyager board.

Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Leo Yu-Chi Liang
89e4154431 common: spl: fix compilation warning
Explicitly specify the type by replacing macro with variable
to fix the possible compilation warning.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
f6da31b634 board: microchip: mpfs_icicle: update to use system controller
A new system controller driver has been created to make code modular and
improve and clean code. Update and remove functions to account for these
additional drivers.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
c93a93e4f2 board: microchip: mpfs_icicle: enable new driver configs
Enable the MPFS mailbox and system controller drivers for use with the
Icicle kit. These functions are crucial for the board setup functions
that run in the Icicle board file - mpfs_icicle.c.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
b7a0ad16f9 misc: add PolarFire SoC system controller
This driver provides an interface to access the functions of the system
controller on the Microchip PolarFire SoC.
This driver includes functions to use the system controller to read
the device serial number.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
111e9bf6a5 mailbox: add PolarFire SoC mailbox driver
This driver adds support for the single mailbox channel of the MSS
system controller on the Microchip PolarFire SoC.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
69539ef2f1 board: microchip: mpfs_icicle: make use of ft_board_setup()
Move ethernet mac address setting to ft_board_setup() to remove the need
for fdt set in custom boot script.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Jamie Gibbons
c22c40546b configs: microchip_mpfs_icicle: enable CONFIG_OF_BOARD_SETUP
Enable CONFIG_OF_BOARD_SETUP and other dependencies to allow the use of
the ft_board_setup() function to replace fdt set in boot scripts for
Microchip's MPFS Icicle kit.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Michal Simek
87bd5806e6 xilinx: mbv: Use separate DTB for binman nodes
The commit d92fdb6067 ("binman: Add option for pointing to separate
description") added support for separating binman description to own file
not the be the part of DT for OS.
The main reason is that binman is not passing dt schema validation that's
why want to keep it separated.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Michal Simek
5fe8b53209 xilinx: mbv: Fix dt properties in interrupt controller node
Properties didn't match dt binding that's why should be fixed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Michal Simek
441ac08142 xilinx: mbv: Add missing mmu-type cpu property
OpenSBI expects mmu-type to be present in DT that's why add it. Without it
OpenSBI disable CPU node which ends up in not working boot.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Michal Simek
5f5bba72c2 xilinx: mbv: Disable OF_HAS_PRIOR_STAGE
There is no reason to use OF_BOARD for MBV because reduced DT is used by
SPL and full DT is passed via u-boot.img or u-boot.itb. There is no reason
to pick up DTB from certain address.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Martin Herren
4bd206a423 riscv: Increase Microchip Icicle's SYS_BOOTM_LEN
Increase Icicle's SYS_BOOTM_LEN to 0x4000000 which is the new default
value.
Done on Conor Dooley's request.

Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Martin Herren
2fd48ef2d7 riscv: Remove default SYS_BOOTM_LEN from defconfig
Remove CONFIG_SYS_BOOTM_LEN from all riscv defconfigs where the new
default value is used.

Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Martin Herren
b8e140c1f2 riscv: Set SYS_BOOTM_LEN default to 0x4000000
This changes the default value to the most commonly used one among
existing defconfigs.

Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-08-14 14:32:00 +08:00
Martin Herren
4da366de5d riscv: Set SYS_BOOTM_LEN explicitly to 0x800000
For all riscv defconfigs that use the current default value.

This is done in provision of changing the default value to the most
common used value of 0x4000000.

Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Michal Simek
c64fc632a8 riscv: cpu: Use CONFIG_IS_ENABLED(CPU) instead of plain ifdef
ifdef CONFIG_CPU only works in U-Boot proper but macro is not working when
XPL phases are used. In this case CONFIG_SPL_CPU is also defined and can be
disabled which is causing compilation error.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 14:32:00 +08:00
Quentin Schulz
28a87c8e9b rockchip: add /chosen/bootsource to U-Boot proper DT
U-Boot typically can be loaded from different storage media, such as
eMMC, SD card, SPI flash, but also from non-persistent media such as USB
(via proprietary protocols loading directly into SRAM, or fastboot, DFU,
 etc..), JTAG, ...

This information is usually reported by the BootROM via some proprietary
mechanism (some specific address in registers/DRAM for example). For
Rockchip, that information is stored in a register
(BROM_BOOTSOURCE_ID_ADDR).

While we already have the information about which medium was used to
load U-Boot proper from SPL (via /chosen/u-boot,spl-boot-device), this
new property represents the medium used to load U-Boot first phase
(depending on configuration, can be VPL/TPL/SPL) which absolutely may
differ from the one used to load U-Boot proper!

It would be useful to know which medium was used to load the first phase
of U-Boot, for example to check fallback mechanisms (proper loaded from
a different medium than first phase) are actually working.

For now, this only applies to Rockchip's U-Boot proper DT but could be
applied to the kernel's as well and possibly for other architectures or
vendors.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-08-13 12:42:05 -06:00
Tom Rini
869217ee29 Merge tag 'qcom-fixes-13Aug2025' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/27364

Quite a few Smatch issues reported by Andrew, and the LMB allocation
fix.
2025-08-13 08:57:49 -06:00
Andrew Goodbody
d9fbc1d70b pinctrl: qcom: sdm845: Limit check off by 1
The driver specifies 154 pins so should have a maximum selector of 153
to ensure that the index into the array special_pins_names does not
overflow.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-2-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-08-13 15:18:49 +02:00
Andrew Goodbody
be12b6e158 pinctrl: qcom: sa8775: Limit check for array index not correct
In sa8775p_get_pin_name the limit check for the index into
msm_special_pins_data allows for more elements than exist. Add code to
ensure the array index remains in bounds.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-1-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-08-13 15:18:49 +02:00
Andrew Goodbody
8a0bb0b176 button: qcom-pmic: Fix dereference of uninitialised pointer
The pointer 'label' is declared and later dereferenced without ever
having a value assigned to it. Add an assignment to this pointer so it
will be valid later when dereferenced.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250723-button-qcom-pmic-v1-1-9c317ac71167@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-08-13 15:17:46 +02:00
Andrew Goodbody
10e65926a3 serial: msm-geni: No need to NULL check priv
The NULL check for priv in qcom_geni_serial_poll_bit serves no useful
prupose as too much other code surrounding it relies on priv being
valid. Remove the NULL check for priv and other related code.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Link: https://lore.kernel.org/r/20250811-serial_msm_geni-v1-2-4499179491bc@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-08-13 15:17:36 +02:00