In case of A/B update systems there should be an option to load the same
binary/binaries to different location and they should work.
Before this patch boot.bin with U-Boot SPL can be added to whatever 32k
offset in SPI and SPL finds u-boot.itb at CONFIG_SYS_SPI_U_BOOT_OFFS
offset. In case of A/B update systems that means that SPL is at different
locations but it still points to the same u-boot.itb which is not correct.
That's why include multiboot value to offset calculation to be able to
point to image from the same base.
It doesn't affect any current system which starts from 0 offset.
This patch also change Kria defconfig which uses A/B setup. Partition
A starts at multiboot 64, partition B at multiboot 496.
And also print message about used SPI offset which is useful for all cases.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/93903a53ad9358ae69991558b787f574797effbe.1699619666.git.michal.simek@amd.com
- Fix emmc detection on colibri_imx7
- Fix DDR configuration on tqma6 to improve Ethernet performance
- Fix aliases and chosen nodes indentation on imx7s-warp
- Convert pico-imx6ul to DM_SERIAL
- Convert pico-pi-imx7d to watchdog driver model to fix 'reset' command
- Select CONFIG_NET_RANDOM_ETHADDR on imx8mp_evk to fix networking on
older boards
- Add USBH_EN gpio hog to fix USB host interface not working on some
Apalis Toradex carrier boards with Apalis iMX8 SoM
- Add PCI fixup for GW73xx-F+
- Fix broken EEPROM read on imx8mn-var-som
Later versions of Colibri iMX7D V1.1B modules use a "new" SoC fusing. The
difference lies in whether we enable the boot ROM to use the eMMC reset
signal. Depending on the SoC fuse, the boot ROM configures this pin as a
GPIO output to drive the reset signal. Our eMMC vs NAND detection
currently only sets that signal to a GPIO without explicitly setting any
direction. Previously, by default, it was set as an input. As the boot ROM
now configures it as an output, we receive a value of zero instead of one,
indicating the absence of the pull-up on eMMC modules.
To fix this, set the SION bit, allowing the reading back of the value
even if it is configured as an output by the boot ROM. It's important to
note that with the new SoC fusing, we now read back what the boot ROM
drives rather than the real value caused by the pull-up resistor. However,
if it were ever driven low, the eMMC would permanently be reset.
In addition, remove hard-coded variant in the eMMC build case as since the
commit 0c39564d02 ("toradex: colibri_imx7: Enable nand/emmc detection
and set boot variant") will anyways always get overridden by the detection
routing in board code.
Fixes: 0c39564d ("toradex: colibri_imx7: Enable nand/emmc detection and set boot variant")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Initially investigating a Linux network issue causing a lot of drop and
poor network performances on a custom system based on a TQMA6A module
(based on an iMX6Q), [1st link below].
I eventually correlated my observations with a contention at the NIC
level when in concurrency with the graphics pipeline. Troubleshooting
this in the kernel lead to disabling DMA bursts accesses made by the IPU
in order to avoid triggering the QoS at the interconnect level, reducing
from 50 to 10% the drop rate on eth0, [2nd link below]. The solution
worked on my setup but not on others, which still suffered from
abnormally high drop rates even with this "fix".
After looking a while into TQ Systems BSP I figured out a number of
differences in recent U-Boot out-of-tree patches they had in their
repository [3rd link]. Parsing the differences one after the other lead
me to this final solution.
The reset pad of the DDR controller was apparently misconfigured, Bit
18-19 picturing the "DDR select field". The current value b11 is
reserved. The only defined value as of version 6 of the iMX6Q manual was
b00 "DDR3 and LPDDR2 mode". In practice no register difference has been
spotted after changing this configuration but all issues tracked thus
far just vanished. All previous fixes have been proven irrelevant. Just
clearing this field solved all our network issues and the drop rate as
measured by iperf3 felt back to 0%.
Link: https://lore.kernel.org/netdev/20231012193410.3d1812cf@xps-13/
Link: https://lists.freedesktop.org/archives/dri-devel/2023-October/428251.html
Link: 15eb6abbef
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The aliases and chosen nodes are currently indented using spaces.
Fix them to use the standard tab indentation.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Commit 68dcbdd594 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset
Signed-off-by: Fabio Estevam <festevam@denx.de>
On an early revision of the imx8mp-evk that I have access to,
the MAC addresses fuses are not programmed, causing failure to bring
the Ethernet interfaces.
Fix this problema by selecting CONFIG_NET_RANDOM_ETHADDR so that
random MAC addresses are assigned and the Ethernet ports become
functional out of the box.
Signed-off-by: Fabio Estevam <festevam@denx.de>
USB host interface is not working on some Apalis Toradex carrier
boards with Apalis iMX8 SoM. This is due to USBH_EN pin, which
powers USB peripherals, having a strong pull-down on some boards,
and a weak pull-down on the others. This USBH_EN pin is left
unconfigured, which means it is in its default state at cold boot:
input with a strong pull-up. As a result, carrier boards with a
weak pull-down have this signal high enough to trigger power
delivery to USB peripherals, and opposite - boards with strong
pull-down on USBH_EN have this signal below the threshold needed
to trigger USB power delivery.
This change configures the USBH_EN pin as gpio hog, fixing this
issue for all Apalis carrier boards regardless of pull-down
resistor value.
Also, update apalis-imx8_defconfig via savedefconfig.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
GW73xx-F board revision switched back to the original PCIe switch due to
part availability.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
On branch WIP/17Oct2023, the EEPROM can no longer be read:
U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400)
CPU: Freescale i.MX8MNano Quad rev1.0 at 1200 MHz
Reset cause: POR
Model: Variscite VAR-SOM-MX8MN Symphony evaluation board
var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19
initcall failed at call 000000004022207c (err=-19)
Convert EEPROM-related properties to bootph-all so that the EEPROM can
also be read outside of SPL.
Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Systems without getopt support fall back to plain full bdinfo print,
handle such a case, which occurs e.g. with sandbox_flattree_defconfig .
Fixes: 8827a38714 ("test: bdinfo: Test bdinfo -h")
Fixes: 2696f3ab81 ("test: bdinfo: Test bdinfo -m")
Fixes: 3ff2d796a6 ("test: bdinfo: Test bdinfo -e")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Recently pylint has started to complain about:
No name 'fs_helper' in module 'tests' (no-name-in-module)
Due to:
from tests import fs_helper
However, we have:
test/py/tests/fs_helper.py
And since we do not want to add a dummy test/py/tests/__init__.py to
silence this warning we instead just disable it as needed.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Recently pylint has started to complain about:
No name 'fs_helper' in module 'tests' (no-name-in-module)
Due to:
from tests import fs_helper
However, we have:
test/py/tests/fs_helper.py
And since we do not want to add a dummy test/py/tests/__init__.py to
silence this warning we instead just disable it as needed.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
To quote the author:
Currently bootmeth_efi crashes while doing a network (dhcp) boot.
This patch series fixes issues and both network and disk boot works.
# Do not modify or remove the line above.
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bootmeth_efi doesn't allocate any buffer to load efi in any case.
enable static buffer flag for all cases.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
While booting with efi, if fdt isn't available externally,
just use the built-in one.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
We need to set boot->fname before calling efi_set_bootdev
otherwise this crashes as bflow->fname is null.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
bootmeth_efi sets up bootp_arch which is read later in bootp.c
Currently bootp_arch is being set as integer string and being
read in bootp.c as hex, this sends incorrect arch value to dhcp server
which in return sends wrong file for network boot.
For ARM64 UEFI Arch value is 0xb (11), here we set environment as 11
and later is read as 0x11 and 17 is sent to dhcp server.
Setting it as hex string fixes the problem.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which
was not used by any driver at the time. The display out exposed as
simple-framebuffer use a power-domain controlled by a device in an
unmapped region.
Add a map covering this region as well as another MMIO region in the
range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO
annotated in Apple's device tree in this range.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Eric Curtin <ecurtin@redhat.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The bdinfo -e should print only the board ethernet settings.
Test the expected output.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The bdinfo -h should print error message that -h is an unknown
parameter and then command help text. Test the expected output.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Factor out the core of test for all bdinfo output into bdinfo_test_all()
and then reuse it to verify that both 'bdinfo' and 'bdinfo -a' print all
the bdinfo output.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Rename bdinfo_test_move() to bdinfo_test_full(). The former is a
remnant of deriving this test from another test. No functional
change.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add optional support for getopt() and in case this is enabled via
GETOPT configuration option, implement support for 'bdinfo -a'.
The 'bdinfo -a' behaves exactly like bdinfo and prints 'all' the
bdinfo information. This is implemented in preparation for other
more fine-grained options.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Currently spi driver gets flash parameter from first subnode.
Few boards have more than one flash with different parameters
and selection of flash is done by on board switch settings.
In such case, uboot needs to be recompiled with updated
device tree to align with board switch settings.
This patch allows to select flash node at runtime.
Boards those are supporting multiple flashes
needs to implement cadence_qspi_get_subnode function and return correct
flash node.
Cc: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
MT25QU01 OPN with 4B OPCODE support is currently not supported in
source code and the driver reuses the definition for "n25q00a"
which has the same silicon ID but is a slower part.
Adding mt25u01g definition to the source code to support a faster
read response for MT25QU01 QSPI NOR Flash device.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
[jagan: fix the id position and commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
