Commit Graph

27352 Commits

Author SHA1 Message Date
Liya Huang
a9fdc7abf3 arm: Remove redundant loading of image copy start offse
Because the beginning is already computed

Signed-off-by: Liya Huang <1425075683@qq.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-02-10 16:37:22 -06:00
Tom Rini
ac5d05f070 Merge patch series "Enable MCU ESM reset"
Judith Mendez <jm@ti.com> says:

This patch series enables ESM reset configuration in board_init_f
for am62x and am62px devices.

This is necessary in order for error events to reset the system.

This patches are tested using watchdog to reset the system via ESM.

Link: https://lore.kernel.org/r/20250129234403.574766-1-jm@ti.com
2025-02-10 10:32:03 -06:00
Santhosh Kumar K
630fe2f88a arm: mach-k3: am62*_init: Probe ESM nodes
On AM62A and AM62P devices, it is possible to route Main ESM error
events to MCU ESM. MCU ESM high error output can trigger the reset
logic to reset the device. So, for these devices we have Main ESM and
MCU ESM nodes in the device tree. Add functions to probe these nodes
if CONFIG_ESM_K3 is enabled.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
2025-02-10 10:30:41 -06:00
Weijie Gao
738deb56b6 mediatek: mt7981: enable ethernet switch auto-detction
This patch enables switch auto-detction for mt7981 as some new mt7981
boards will use AN8855 ethernet switch.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:28:31 -06:00
Wadim Egorov
7c652360c8 arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c
Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
are accessible across all stages. This enables reading the SoM
configuration at any point during the boot process.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2025-02-10 10:28:05 -06:00
Weijie Gao
6331b8b0c8 mediatek: mt7986: rename pinctrl to pio in mt7986-u-boot.dtsi
The change from pinctrl to pio was missing in mt7986-u-boot.dtsi and will
cause build failure. Now fix it.

Fixes: f1775996ba (mediatek: mt7986: move gpio-controller up and rename pinctrl to pio)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:26:54 -06:00
Tom Rini
7a20c89bd0 Merge patch series "led: add function naming option from linux"
Heiko Schocher <hs@denx.de> says:

In linux we have the option to create the name of a led
optionally through the following properties:

- function
- color
- function-enumerator

This series adds support for parsing this properties if there
is no label property.

Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de
[trini: Document name parameter in led.h]
2025-02-07 11:39:24 -06:00
Heiko Schocher
592b6f394a led: add function naming option from linux
in linux we have the option to create the name of a led
optionally through the following properties:

- function
- color
- function-enumerator

This patch adds support for parsing this properties if there
is no label property.

The led name is created in led_post_bind() and we need some
storage place for it. Currently this patch prevents to use
malloc() instead it stores the name in new member :

        char name[LED_MAX_NAME_SIZE];

of struct led_uc_plat. While at it append led tests for the
new feature.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-02-07 10:53:39 -06:00
Tom Rini
c2e00482d0 Merge tag 'xilinx-for-v2025.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.04-rc2

fpga:
- Cleanup help
- Show xilinx only options on Xilinx devices

ospi-versal:
- Fix alignment issue
- Fix cadence_qspi_flash_reset() prototype

zynqmp:
- Define usb_pgood_delay
- Fix bootseq number

versal:
- Fix mini_ospi configuration

versal2:
- Enable OPTEE

xilinx:
- Enable some flashes
- Clean up SYS_MALLOC_F_LEN Kconfig
- Some binman fixes
- DT updates
- Enable mkfwumdata compilation
- Enable meminfo command
- Switch to LWIP and enable HTTPS
2025-02-06 08:09:54 -06:00
Liya Huang
93bcabd9b2 arm: Correct dependency for STATIC_MACH_TYPE
Kconfig should not display the STATIC_MACH_TYPE option when
SUPPORT_PASSING_ATAGS is not selected. For example, when using most
platforms with menuconfig, it shows the STATIC_MACH_TYPE option causing
confusion.  As we know, this should not occur when SUPPORT_PASSING_ATAGS
is not selected

[trini: Reword commit message]
Signed-off-by: Liya Huang <1425075683@qq.com>
2025-02-05 12:43:48 -06:00
Liya Huang
b16e1db2a0 armv7m: kconfig adds the NVIC option and masks the GIC option when NVIC is selected
ARMv7-M architecture uses NVIC instead of GIC.
NVIC is an interrupt controller specially designed for
ARM Cortex-M series processors.

Signed-off-by: Liya Huang <1425075683@qq.com>
2025-02-05 12:43:38 -06:00
Michal Simek
eade90fd00 arm64: zynqmp: Describe images without TF-A
U-Boot can run out of EL3, NS-EL2 and NS-EL1. Currently default
configuration is NS-EL2 with TF-A but when TF-A is not passed and
configured images can still boot just fine. That's why support this
configuration and describe it via binman.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b3dad80138e97005df3d033b4611c9d7e05a177.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
f339584992 arm64: zynqmp: Use DTB address base from .config
CONFIG_XILINX_OF_BOARD_DTB_ADDR holds DTB address which U-Boot is checking.
Currently address in binman match default value but macro can be used
directly.
Also sync node name (s/hash-1/hash/) and sync location to have the same
order load/hash/image.

All binman DTSes are compiled that's why also guard
CONFIG_XILINX_OF_BOARD_DTB_ADDR which depends on OF_BOARD || OF_SEPARATE
which is a problem for mini configurations which are using OF_EMBED.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a22c9671b965b222bfd419f5bfaee012929f3d88.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
89e26b49a9 arm64: zynqmp: Fix TEE loading address and add hash
There is incorrect loading address listed for TEE.
CONFIG_BL32_LOAD_ADDR should be used.
Also there is missing hash for this entry which is present for other nodes.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4e7e3a7110acc050ea7c06ac661e5b5be46e8602.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
c4a7112536 arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a
connection which is used by fdt_fixup_ethernet() for updating
local-mac-address in DT.
On Kria SOM MAC address is read from i2c eeprom at start and based on it
environment variables are created. Without creating aliases U-Boot is not
able to inject local-mac-address DT property and OS won't get the same MAC
address unless another i2c read is happening in OS.
Also aliases are using string not phandle that's why full path has to be
provided but that shouldn't be a big issue because location of ethernet
controller is fixed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d360e71a0530d201578e27a6997dbd472772e39.1737466907.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Prasad Kummari
0184f3eead arm64: zynqmp: enable u-boot itb generation via binman if SPL is enabled
Output images are generated via Binman only if SPL is enabled, as
there is no consumer for them otherwise. An #ifdef check ensures that
when SPL is enabled, Binman generates the U-Boot ITB. If SPL is disabled,
ITB generation is skipped since the ITB format is supported only by SPL.
Without SPL, generating such an image is unnecessary, as it would not be
used

The second reason is that when a DTB is passed, the current logic cannot
handle it without an additional step in U-Boot to parse an appended FIT
image and enable board-specific code to select the correct DTB config.
The MULTI_DTB_FIT configuration should be used if support for multiple
DTBs is required, but SPL is not being used.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7cba738ae36dacf7d1b0cfbaf13e0c9b3a0df225.1737462296.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
5f87bc16d4 xilinx: Remove SYS_MALLOC_F_LEN setup via board Kconfig
The commit e056892422 ("Kconfig: Change SYS_MALLOC_F_LEN default to
0x2000") already setup default values from board Kconfigs that's why no
reason to duplicate it again.

Fixes: e056892422 ("Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c3edd75b7a19d5cc205c9d5c37c2d86189ca3de6.1737380025.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Marek Vasut
8a2ffd5a85 arm64: renesas: Add R-Car S4 Starter Kit support
Add support for the R-Car S4 Starter Kit with R8A779F4 SoC support.
This implementation natively uses OF_UPSTREAM to pull in most recent
DT. The defconfig is derived from S4 Spider, with reduced UART baud
rate to 921600 Bdps. The DT alias to rswitch is removed as the alias
should point to rswitch ports, not to rswitch itself, see [1].

[1] https://lore.kernel.org/linux-arm-kernel/20250118111344.361617-5-marek.vasut+renesas@mailbox.org/

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04 23:32:00 +01:00
Marek Vasut
5392ad2fd9 remoteproc: renesas: Synchronize caches across cores
Explicitly flush icache on the CR52 core before jumping to the next
stage software to make sure it does not contain any invalid content.
Explicitly flash and invalidate dcache on the CA76 core both over the
trampoline buffer and over the CR52 firmware, and then trigger full
system synchronization, to make sure the data surely land in DRAM,
from where the CR52 can surely pick them up.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04 23:32:00 +01:00
Tom Rini
bfaed6969c Merge patch series "mediatek: final preparation for OF_UPSTREAM support"
Christian Marangi <ansuelsmth@gmail.com> says:

This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.

The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.

This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.

All patch are the final changes after the pinctrl patch
merged previously.

All patch pass CI tests

Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
2025-02-04 11:57:36 -06:00
Christian Marangi
c6f8119dc4 arm: dts: mediatek: add PCIe node for MT7981
Add PCIe node for MT7981 with all the required properties to make PCIe
work.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
John Crispin
5fa18e47e4 arm: dts: mediatek: add USB nodes for MT7981
Add USB PHY nodes for MT7981. These are needed for USB support and also
for PCIe support as the u3 PHY can also be used for PHY.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
4d173d4a64 mediatek: mt7981: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
cd06e60c44 mediatek: mt7988: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
8c2cb748ef pinctrl: mediatek: mt7988: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
f1775996ba mediatek: mt7986: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
08e70f772c pinctrl: mediatek: mt7986: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
8b1ea8a4b9 pinctrl: mediatek: mt7981: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Yao Zi
faf237d1b4 riscv: cpu: jh7110: fallback to generic cleanup_before_linux()
JH7110 SoC requires no specific handling before entering Linux kernel.
Let's drop the specific implementation to avoid duplication.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 15:26:06 +08:00
Yao Zi
334980f4cf riscv: cpu: generic: fallback to generic cleanup_before_linux()
The current implementation is equivalent to the fallback one, so
this shouldn't change any behaviour but cleans the code up only.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 15:26:06 +08:00
Yao Zi
f88e3b7739 riscv: add a generic implementation for cleanup_before_linux()
Most RISC-V SoCs have similar cleanup_before_linux() functions. Let's
provide a weak symbol as fallback to reduce duplicated code.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 15:26:06 +08:00
Yu-Chien Peter Lin
47d90f6bd3 riscv: dts: binman.dtsi: Include OP-TEE OS image
The following diagram illustrates the boot flow for OP-TEE OS
initialization on RISC-V.

    (1)-----------+
     | U-Boot SPL |
     +------------+
         |
         v
    (2)-------------------------------------------------------------+
     | OpenSBI (fw_dynamic.bin)                                     |
     |                (4)------------------------+                  |
     |                 | optee dispatcher driver |                  |
     +-----------------+-------^---------|-------+------------------+
M-mode   |                     |         |
---------+--[trusted domain]---+----.----+--[untrusted domain]-------
S-mode   |  (coldboot domain)  |    |    |
         v                     |    |    v
    (3)---------------------------+ |(5)----------------------------+
     | OP-TEE OS (tee.bin)        | | | U-Boot (u-boot-nodtb.bin)   |
     +----------------------------+ | +-----------------------------+
                                    |    |
                                    |    v
                                    |(6)----------------------------+
                                    | | Linux                       |
                                    | +-----------------------------+

This patch enables the inclusion of the OP-TEE binary within the
U-Boot ITB, allowing it to be loaded to a platform defined address
by U-Boot SPL.

Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 15:26:00 +08:00
Yu-Chien Peter Lin
99654e1b96 riscv: Add CONFIG_SPL_OPTEE_LOAD_ADDR
Allow specifying load address of OP-TEE binary. It is
recommended that the specified address aligns with the
base address of an PMP-protected NAPOT region and matches
the CFG_TDDRAM_START configuration in OP-TEE.

Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 15:26:00 +08:00
Heinrich Schuchardt
490be9de22 riscv: AVAILABLE_HARTS is not compatible with XIP
If CONFIG_AVAILABLE_HARTS=y, variable available_harts_lock is created in
the data section which will not be writable while executing from flash.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 11:33:04 +08:00
Huan Zhou
3691fbccfc riscv: spacemit: k1: probe dram size during boot phase.
Implement functionality to probe and calculate the DRAM size
during the boot phase for the RISC-V spacemit K1 platform.

Tested-by: Marcel Ziswiler <marcel@ziswiler.com> # BPI-F3 16G
Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-02-03 11:33:04 +08:00
Tom Rini
a582e48533 Merge tag 'u-boot-stm32-20250131' of https://source.denx.de/u-boot/custodians/u-boot-stm
STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
  management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2

STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
2025-01-31 08:32:11 -06:00
Patrice Chotard
84bbb8f59a ARM: dts: stm32: Update ck_flexgen_08 frequency.
Spurious characters are displayed on U-Boot console.
Usart2 clock is ck_flexgen_08 and its frequency is set
to an incorrect value.

Update ck_flexgen_08 frequency from 100MHz to 64MHz.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31 10:13:10 +01:00
Patrice Chotard
6b20aed7cf stm32mp: Fix board_get_usable_ram_top()
mmu_set_region_dcache_behaviour() parameters must be aligned
which is not always the case.
For example for STM32MP2, we stayed stuck inside
mmu_set_region_dcache_behaviour() in an infinite loop because
set_one_region() always return 0 due to start parameter which is
not aligned.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31 10:13:10 +01:00
Patrick Delaunay
698c92c647 ARM: dts: stm32mp13: Add support of ck_usbo_48m in pre-reloc stage
The clock ck_usbo_48m is a clock source for RCC, so the ck_usbo_48m
clock provided by usbphyc need to be probed when RCC clock driver is
required, in pre-reloc stage.

This patch allow to remove the following warning:

clk_register: failed to get ck_usbo_48m device (parent of usbo_k)

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31 10:13:10 +01:00
Patrice Chotard
2d774c19f2 arm: stm32mp: stm32prog: update multiplier is part-size is above SZ_1G
Set multiplier to 'G' if part->size if above SZ_1G.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31 08:57:39 +01:00
Patrice Chotard
cc8579cc0c arm: stm32mp: stm32prog: fix warning when CONFIG_SYS_64BIT_LBA is enable
If CONFIG_SYS_64BIT_LBA flag is enable, following warning is triggered:

../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c: In function 'init_device':
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:27: warning: format
'%ld' expects argument of type 'long int', but argument 8 has type
'lbaint_t' {aka 'long long unsigned int'} [-Wformat=]
  793 |                 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
      |                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../include/log.h:157:21: note: in definition of macro 'pr_fmt'
  157 | #define pr_fmt(fmt) fmt
      |                     ^~~
../include/log.h:182:33: note: in expansion of macro 'log'
  182 | #define log_debug(_fmt...)      log(LOG_CATEGORY, LOGL_DEBUG, ##_fmt)
      |                                 ^~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:17: note: in expansion
of macro 'log_debug'
  793 |                 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
      |                 ^~~~~~~~~
../arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c:793:42: note: format string
is defined here
  793 |                 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
      |                                        ~~^
      |                                          |
      |                                          long int
      |                                        %lld

Cast block_dev->lba to u64 and set the length specifier to %lld which
is ok with or without CONFIG_SYS_64BIT_LBA flag.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31 08:57:39 +01:00
Tom Rini
ac3eeb1542 Merge patch series "Add support for MediaTek MT7987 SoC"
Weijie Gao <weijie.gao@mediatek.com> says:

This patch series add support for MediaTek MT7987 SoC with its reference
boards and related drivers.

This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these
boards. The clock, pinctrl drivers and the SoC initializaton code are also
included.

Link: https://lore.kernel.org/r/cover.1737621362.git.weijie.gao@mediatek.com
2025-01-30 14:35:30 -06:00
Weijie Gao
c80a3fb961 board: mediatek: add MT7987 reference boards
This patch adds general board files based on MT7987 SoC.

MT7987 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with one spi controller.
So three configs are need for these boot types:

1. mt7987_rfb_defconfig - SPI-NOR (spi2) and SPI-NAND (spi0)
2. mt7987_emmc_rfb_defconfig - eMMC + SPI-NOR (spi2)
3. mt7987_sd_rfb_defconfig - SD + SPI-NOR (spi2)

Note: spi2 also supports booting from SPI-NAND, but not the default option.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-30 14:35:14 -06:00
Weijie Gao
2d6962e061 arm: mediatek: add support for MediaTek MT7987 SoC
This patch adds basic support for MediaTek MT7987 SoC.
This includes files that will initialize the SoC after boot and
its device tree.

In order to maximize the continuous usable  memory space, MT7987 has its
ATF BL31 loaded at the top of RAM. Since u-boot will also locate itself to
top of RAM, u-boot will read the actual memory region of BL31 and set
correct gd->ram_top to avoid u-boot overlapping with BL31.

As now support for mt7987 hasn't been submitted to linux kernel, all dts
filed will be put to arch/arm/dts. They'll be removed after successfully
being merged by linux kernel, and OF_UPSTREAM will also be switched on.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-30 14:35:14 -06:00
Duje Mihanović
5983f0ff61 board: samsung: add initial support for coreprimevelte board
Samsung Galaxy Core Prime VE LTE is an entry-level PXA1908-based
smartphone. It has 1GB of DRAM, 8GB eMMC and USB connectivity.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-01-28 09:08:44 +01:00
Duje Mihanović
08b27fce29 arm: mmp: add initial support for PXA1908 SoC
Add initial support for Marvell PXA1908. The SoC has 4 Cortex-A53 cores,
a GC7000UL GPU and a variety of peripheral controllers.

Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-01-28 09:08:44 +01:00
Tony Dinh
116d1d0047 arm: kirkwood: Enable bootstd and other modernization for OpenRD boards
Enable bootstd for OpenRD boards
Update defconfigs to the latest u-boot requirements
Remove JFFS2 support. See JFFS2 Vulnerability[1].
Move default envs to text-base environment

[1] https://lore.kernel.org/u-boot/20241114233005.GN3600562@bill-the-cat/T/#m2fc25da1d2c019bc3cd8676991fdd64b8a21aa9b

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2025-01-28 09:08:44 +01:00
Tom Rini
b39b3c9a43 Merge tag 'u-boot-imx-master-20250127' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/24366

- Refactor the imx pinctrl driver.
- Enable optional ENETREF clock on i.MX95
- Remove optional from tee-os entry on the i.MX8M u-boot devicetrees.
2025-01-27 12:46:48 -06:00
Tom Rini
d8a7100d65 Subtree merge tag 'v6.13-dts' of dts repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git

[rockchip fixes from Jonas Karlman via IRC]
2025-01-26 16:19:33 -06:00
Yannic Moog
24b575bc4f arm: dts: imx8m*-u-boot: remove optional from tee-os entry
tee-os node is guarded by CONFIG_OPTEE. Since OPTEE adds driver support
for OP-TEE, the binary should then be packaged in the bootable image.
Remove the optional property to enforce this requirement.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2025-01-25 09:06:14 -03:00