Switch to use CONFIG_PHYTEC_EEPROM_BUS instead of the hard coded value
of 2 for the EEPROM I2C bus for both SPL and U-Boot proper. Possible
since commit 88a1816a9b ("board: phytec: common: Add PHYTEC_EEPROM_BUS
to Kconfig").
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
In case of booting from serial loader (USB) we want to always use the
default environment in order to get a defined state that is
independent of any environment stored in persistent memory.
This way we can avoid corruption of the boot process during
development and manufacturing by existing environment settings in
flash.
Signed-off-by: Eberhard Stoll <eberhard.stoll@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
For booting via USB we want to automatically start the fastboot
command in order to access the board via uuu or other tools.
This allows for easier bringup of new boards during development
and manufacturing.
Signed-off-by: Annette Kobou <annette.kobou@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The header from the local directory should use double quotes instead
of brackets. Otherwise the compiler might not search the local
directory.
Fixes: 93935acc6f ("imx: imx6ul: kontron-sl-mx6ul: Select correct boot and env device")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
exynos_power_init sets up regulators for the emmc and sdcard, but
these regulators are already marked as always-on and boot-on and hence
are handled already by the regulator-uclass. Since we currently try to
set them up twice we get error -114 (EALREADY) from exynos_power_init
on every boot:
LDO20@VDDQ_EMMC_1.8V: set 1800000 uV; enabling (ret: -114)
LDO22@VDDQ_EMMC_2.8V: set 2800000 uV; enabling (ret: -114)
LDO21@TFLASH_2.8V: set 2800000 uV; enabling (ret: -114)
Remove the superfluous exynos_power_init to silence these errors.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
AMD/Xilinx/FPGA changes for v2026.01-rc1
mbv:
- Add it to CI loop
versal2:
- Wire UFS driver
serial:
- Add support for OF_PLATDATA in uartlite
misc:
- Mark some structures as const
Drop SUPPORT_EXTENSION_SCAN and enable PHYTEC_SOM_DETECTION_BLOCKS
to align with other PHYTEC platforms. These options were missed when
phyCORE-AM62Ax support was added.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Use CONFIG_PHYTEC_EEPROM_BUS instead of the hard coded value for the i2c bus.
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add the option to choose a different bus number than 0 for the i2c eeprom
based som detection.
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled.
This is setting a proper default for RAUC enabled systems.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Martin Schwan <m.schwan@phytec.de>
Fix PHYTEC EEPROM bus mismatch between SPL and U-Boot proper by enabling
CONFIG_SPL_DM_SEQ_ALIAS=y on phyCORE-i.MX93 boards. This way, both the
SPL and U-Boot proper will respect the device-tree aliases for I2C devs
and use the same I2C bus number for phytec_eeprom_data_setup() function
calls. This makes code less confusing and more robust.
Fixes an issue apparent since commit 79f3e77133 ("Subtree merge tag
'v6.16-dts' of dts repo [1] into dts/upstream") where SPL would spew the
following error:
phytec_eeprom_read: i2c EEPROM not found: -110.
phytec_eeprom_data_setup: EEPROM data init failed
While later in U-Boot proper, EEPROM would be successfully read out.
This happens because Linux device-tree for phyBOARD-Segin-i.MX93 since
aforementioned commit enables I2C bus 2 (lpi2c2 is used for audio codec
and RTC) which breaks SPL I2C bus number ordering and I2C EEPROM bus is
shifted by +1. Now, lets prevent this from happening again by utilizing
device-tree aliases also in the SPL.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Making the setup_mac_from_eeprom optional for boards without
CONFIG_PHYTEC_SOM_DETECTION_BLOCKS.
Signed-off-by: John Ma <jma@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Enable cache for J722s to optimize performance of CPU to access data from
memory.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Enable cache for AM62p to optimize performance of CPU to access data from
memory.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Set the uart clock frequency according to dts by default.
If CONFIG_SYS_SKIP_UART_INIT is not enabled, no need to
do board_set_console to change the console bootarg.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
The Retronix R-Car V4H Sparrow Hawk EVTB1 uses 1V8 IO voltage supply
for VDDQ18_25_AVB power rail. Update the AVB0 pinmux to reflect the
change in IO voltage. Since the VDDQ18_25_AVB power rail is shared,
all four AVB0, AVB1, AVB2, TSN0 PFC/GPIO POC[7..4] registers have to
be configured the same way.
Correct the voltage for EVTA1 boards accordingly by patching the U-Boot
control DT in SPL.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The R-Car V4H SoC before rev.3.0 can not support dual-rank LPDDR5 DRAM.
This affects 16 GiB dual-rank DRAM configuration of Retronix R-Car V4H
Sparrow Hawk board. Fall back to 8 GiB single-rank DRAM configuration
on such systems instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Retronix R-Car V4H Sparrow Hawk old revision EVTA1 does not have MicroSD
voltage switch populated on the board, therefore the board supports only 3V3
and non-UHS MicroSD cards. While the EVTB1 board is populated with Winbond
W77Q51NW SPI NOR, the EVTA1 board is populated with Spansion S25FS512S SPI
NOR, those those SPI NOR IDs to discern the two board revisions and apply
the MicroSD related DT changes.
The MicroSD related DT changes modify the regulator node, which is now a
regulator-fixed and supplies only 3V3, and remove sd-uhs-sdr50 and
sd-uhs-sdr104 properties from the MicroSD slot controller node.
The MicroSD related DT changes cannot be applied as DTO, because the base
DT contains nodes which have to be removed in case of EVTA1, but have to
be present in case of EVTB1 and newer revisions of the board. Because the
EVTA1 is an old revision of the board that is not generally available, it
is better to special case it and keep the base DT compatible with EVTB1
and newer revisions of the board which are actually available.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
When writing the EEPROM fails, the command usage help text is displayed
after the error message. We should only display the error message instead.
If writing the EEPROM fails, return CMD_RET_FAILURE (1) instead of
CMD_RET_USAGE (-1).
Fixes: aea1bd95b6 ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: E Shattow <e@freeshell.de>
Introduce Voyager board specific code, including
- dram info
- shared cache enabling
Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The Voyager is Andes' first RISC-V development board.
It is built around Qilai SoC,
which includes Andes AX45MP quad-core cluster.
Introduce the Kconfig entry for the Voyager board.
Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
A new system controller driver has been created to make code modular and
improve and clean code. Update and remove functions to account for these
additional drivers.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Enable the MPFS mailbox and system controller drivers for use with the
Icicle kit. These functions are crucial for the board setup functions
that run in the Icicle board file - mpfs_icicle.c.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Move ethernet mac address setting to ft_board_setup() to remove the need
for fdt set in custom boot script.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
There is no reason to use OF_BOARD for MBV because reduced DT is used by
SPL and full DT is passed via u-boot.img or u-boot.itb. There is no reason
to pick up DTB from certain address.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This pull request introduces initial U-Boot support for Agilex7 M-series, along
with several enhancements and cleanups across existing Agilex platforms. Key
changes include new board support, DDR driver additions, updated device trees,
and broader SoCFPGA SPL improvements.
Highlights:
- Agilex7 M-series bring-up:
- Basic DT support and board initialization for Agilex7 M-series SoC and
SoCDK.
- New sdram_agilex7m DDR driver with UIBSSM mailbox support and HBM support.
- Clock driver support for Agilex7 M-series.
- New defconfig: socfpga_agilex7m_defconfig.
- Agilex and Agilex5 enhancements:
- Improved SPL support: ASYNC interrupt enabling, system manager init
refactor, and cold scratch register usage.
- Updated firewall probing and watchdog support in SPL.
- Cleaned up DDR code, added secure region support for ATF, and improved warm
reset handling.
- Device Tree and config updates:
- Migration to upstream Linux DT layout for Agilex platforms.
- Consolidated socfpga_agilex_defconfig and removed deprecated configs.
- Platform-specific environment variables for Distro Boot added.
- Driver fixes and cleanups:
- dwc_eth_xgmac and clk-agilex cleanup and improvements.
- Several coverity and style fixes.
Contributions in this PR are from Alif Zakuan Yuslaimi, Tingting Meng, and
Andrew Goodbody. This patch set has been tested on Agilex 5 devkit, Agilex
devkit and Agilex7m devkit.
Passing all pipeline tests at SoCFPGA U-boot custodian
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27318
use the new email address for community work.
While at it, cleanup git shortlog output, by adding
fixes in .mailmap
Signed-off-by: Heiko Schocher <hs@nabladev.com>
Agilex7 M-series support has been added using upstream Linux DTS.
socfpga_agilex_socdk-u-boot.dtsi was updated to support both Agilex and
Agilex7 M-series platforms.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
The base address of system manager can be retrieved
using DT framework through the system manager driver.
Enable system manager support for Agilex by probing the
system manager driver to initialize during SPL boot up.
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Refactor system manager initialization by searching for system manager
alias in Agilex5 device tree instead of manually passing node name to
the device model calling function
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
For phyCORE-i.MX93 SoMs with i.MX93 parts running in VOLT_LOW_DRIVE mode
(SoCs with speed grade fuse set to 900 MHz) reduce usdhc clocks from 400
MHz to 266 MHz. Do this in board code since global imx9 board_fix_fdt()
is not used in case of phycore-imx93 board since commit d3b9b79968
("board: phytec: imx93: Add eeprom-based hardware introspection").
While at it, add a note to ft_board_setup() function to inform that
fixup for Linux device-tree is taken care by ft_system_setup() in imx9
global arch/arm/mach-imx/imx9/soc.c implementation.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up
resistor on the SoM itself, and the pull up is mandatory for correct USB OTG
ID pin detection. U-Boot proper already configures the USB OTG ID pin pull
up via DT pinctrl node entry.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
The Galaxy R (GT-I9103) and Captivate Glide (SGH-i927) are both Tegra 2
based Samsung smartphones released in 2011. They both feature 1 GB of RAM
and 8 GB of expandable flash memory. The key difference is that the
Captivate Glide has an OLED panel (contrary to LCD in Galaxy R) and a
QWERTY keyboard in form factor of a slider.
Signed-off-by: Ion Agorria <ion@agorria.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Pegatron Chagall (originally built by Pegatron, but later rebranded by
other vendors under names Fujitsu Stylistic M532, Olivetti Olipad 3,
Siragon 4N, Realpad Bunaken, DNS AirTab P110w / P110g etc) is a mostly
business-oriented tablet sold in 2012 in different variants, mostly in
Europe, with slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.
Tested-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/27236
- Add support for STM32 TIMERS and STM32 PWM on STM32MP25
- Add STM32MP13xx SPL and OpTee-OS start support
- Fix header misuse in stm32 reset drivers
- Fix STMicroelectronics spelling
- Fix clk-stm32h7 wrong macros used in register read
- Fix PRE_CON_BUF_ADDR on STM32MP13
- Fix clock identifier passed to struct scmi_clk_parent_set_in
- Fix stm32 reset for STM32F4/F7 and H7
- Enable OF_UPSTREAM_BUILD_VENDOR for stm32mp13_defconfig
- Add STM32MP23 SoC and stm32mp235f-dk board support
Add default STM32MP13xx debug UART initialization. This is similar
to STM32MP15xx debug UART initialization, except the RCC registers
are at different offsets and the UART pinmux pins are different.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
The STM32MP13xx PMIC initialization for DDR3 DRAM type is similar
to the STM32MP15xx PMIC initialization, except the VTT rail is not
enabled. Fill in the STM32MP13xx support.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
