If U-Boot has a DTB built in (appended to the image directly) then this
was likely intentional, we should prioritise it over one provided by ABL
(if there was one).
Make this behaviour explicit, and panic if no valid DTB could be found
anywhere. Returning an error is not useful in this case as U-Boot would
just crash later in a more confusing way.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Tim Harvey <tharvey@gateworks.com> says:
Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
Boot Area Partition 1
Boot Area Partition 2
RPMB Partition
General Purpose Partition 1
General Purpose Partition 2
General Purpose Partition 3
General Purpose Partition 4
User Data Area
These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
0x0: No boot acknowledge sent (default
0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
0x0: Device not boot enabled (default)
0x1: Boot Area partition 1 enabled for boot
0x2: Boot Area partition 2 enabled for boot
0x3-0x6: Reserved
0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
0x0: No access to boot partition (default)
0x1: Boot Area partition 1
0x2: Boot Area partition 2
0x3: Replay Protected Memory Block (RPMB)
0x4: Access to General Purpose partition 1
0x5: Access to General Purpose partition 2
0x6: Access to General Purpose partition 3
0x7: Access to General Purpose partition 4
Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.
You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.
U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
EXT_CSD_BOOT_ACK(x) (x << 6)
EXT_CSD_BOOT_PART_NUM(x) (x << 3)
EXT_CSD_PARTITION_ACCESS(x) (x << 0)
EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)
There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field used by the various mmc_switch incarnations.
To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.
Additionally provide arrays of the field names and allow those to be
used in the 'mmc partconf' command and in board support files.
The first patch adds enumerated types and makes use of them which
represents no compiled code change.
The 2nd patch adds the array of names and uses them in the 'mmc
partconf' command.
The 3rd patch uses the array of hardware partition names in a board
support file to show what emmc hardware partition U-Boot is being loaded
from.
Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
Boot Area Partition 1
Boot Area Partition 2
RPMB Partition
General Purpose Partition 1
General Purpose Partition 2
General Purpose Partition 3
General Purpose Partition 4
User Data Area
These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
0x0: No boot acknowledge sent (default
0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
0x0: Device not boot enabled (default)
0x1: Boot Area partition 1 enabled for boot
0x2: Boot Area partition 2 enabled for boot
0x3-0x6: Reserved
0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
0x0: No access to boot partition (default)
0x1: Boot Area partition 1
0x2: Boot Area partition 2
0x3: Replay Protected Memory Block (RPMB)
0x4: Access to General Purpose partition 1
0x5: Access to General Purpose partition 2
0x6: Access to General Purpose partition 3
0x7: Access to General Purpose partition 4
Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.
You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.
U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field which is also the value used to specify the
hardware partition of the various mmc_switch incarnations.
To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.
This represents no code changes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Sughosh Ganu <sughosh.ganu@linaro.org> says:
This is a follow-up from an earlier RFC series [1] for making the LMB
and EFI memory allocations work together. This is a non-rfc version
with only the LMB part of the patches, for making the LMB memory map
global and persistent.
This is part one of a set of patches which aim to have the LMB and EFI
memory allocations work together. This requires making the LMB memory
map global and persistent, instead of having local, caller specific
maps. This is being done keeping in mind the usage of LMB memory by
platforms where the same memory region can be used to load multiple
different images. What is not allowed is to overwrite memory that has
been allocated by the other module, currently the EFI memory
module. This is being achieved by introducing a new flag,
LMB_NOOVERWRITE, which represents memory which cannot be re-requested
once allocated.
The data structures (alloced lists) required for maintaining the LMB
map are initialised during board init. The LMB module is enabled by
default for the main U-Boot image, while it needs to be enabled for
SPL. This version also uses a stack implementation, as suggested by
Simon Glass to temporarily store the lmb structure instance which is
used during normal operation when running lmb tests. This does away
with the need to run the lmb tests separately.
The tests have been tweaked where needed because of these changes.
The second part of the patches, to be sent subsequently, would work on
having the EFI allocations work with the LMB API's.
[1] - https://lore.kernel.org/u-boot/20240704073544.670249-1-sughosh.ganu@linaro.org/T/#t
Notes:
1) These patches are on next, as the alist patches have been
applied to that branch.
2) I have tested the boot on the ST DK2 board, but it would be good to
get a T-b/R-b from the ST maintainers.
3) It will be good to test these changes on a PowerPC platform
(ideally an 85xx, as I do not have one).
The value of ram_top address currently gets computed in an indirect
manner. The boot_fdt_add_mem_rsv_regions() function gets called first
to reserve the memory region occupied by OP-TEE in the LMB memory
map. This is followed by a call to the lmb_alloc() API, which returns
an address which is below the OP-TEE base address. This address is the
value of ram_top returned by the board_get_usable_ram_top() function.
This has now changed, as the LMB memory map, which is no longer local,
gets set up after relocation. Get the OP-TEE base address by reading
the device tree, and set the ram_top from this value.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The optee_get_reserved_memory() function returns the OP-TEE base
address and size. The function gets these values from the
FDT. Currently, this function is defined only to be called in the SPL
phase. Move this function to a place where it can be invoked from the
main U-Boot phase, where it will be used to compute the ram_top
address.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The sandbox iommu driver uses the LMB module to allocate a particular
range of memory for the device virtual address(DVA). This used to work
earlier since the LMB memory map was caller specific and not
global. But with the change to make the LMB allocations global and
persistent, adding this memory range has other side effects. On the
other hand, the sandbox iommu test expects to see this particular
value of the DVA. Use the DVA address directly, instead of mapping it
in the LMB memory map, and then have it allocated.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Initialise the ram bank information for sandbox in SPL. The ram bank
information gets initialised as part of the SPL initialisation
sequence in board_init_r(), which is then used for adding available
memory to the LMB memory map.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The TCG event log buffer is being set at the end of ram memory. This
region of memory is to be reserved as LMB_NOMAP memory in the LMB
memory map. The current location of this buffer overlaps with the
memory region reserved for the U-Boot image, which is at the top of
the usable memory. This worked earlier as the LMB memory map was not
global but caller specific, but fails now because of the overlap.
Move the TCG event log buffer to the start of the ram memory region
instead. Move the location of the early trace buffer and the load
buffer for U-Boot(spl boot) accordingly.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
All of the current definitions of arch_lmb_reserve() are doing the
same thing -- reserve the region of memory occupied by U-Boot,
starting from the current stack address to the ram_top. Introduce a
function lmb_reserve_uboot_region() which does this, and do away with
the arch_lmb_reserve() function.
Instead of using the current value of stack pointer for starting the
reserved region, have a fixed value, considering the stack size config
value.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
All the current function definitions of arch_lmb_reserve() are doing
the same thing -- reserve the U-Boot memory region. The powerpc(ppc)
architecture, in addition, is making some LMB reservations for the
bootm related image loading. Move these ppc specific reservations to
the arch_misc_init() function. This allows to move the U-Boot memory
region reservation to a different function, and remove
arch_lmb_reserve() in a subsequent commit.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the changes to make the LMB reservations persistent, the common
memory regions are being added during board init. Remove the
now superfluous lmb_init_and_reserve() function.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data structure.
Two alloced lists are declared -- one for the available(free) memory,
and one for the used memory. Once full, the list can then be extended
at runtime.
[sjg: Use a stack to store pointer of lmb struct when running lmb tests]
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
[sjg: Optimise the logic to add a region in lmb_add_region_flags()]
Philip Oberfichtner <pro@denx.de> says:
This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
Before doing that, a few general adaptions to the dwc_eth_qos.c main
driver are required. Most notably, the preparation for PCI based driver
instances, which do not necessarily use a device tree.
Implement a x86 memory barrier mb(). Furthermore, remove the previously
used mfence() function, which does the same thing.
The mb() macro is now equivalent to Linux (v6.9):
linux/arch/x86/include/asm/barrier.h
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22211
- Enable SPI NOR flash support and MTD partitions for phycore_imx8mp.
- Convert mx6slevk to OF_UPSTREAM and watchdog DM.
- Cleanup some mx5/mx6 USB options.
- Make PLL settings configurable at board level.
- Set CONFIG_SPL_LOAD_FIT_ADDRESS for verdin-imx8m/p.
- Make the mxc-gpio reading state of GPIO pins in output mode to be
consistent with the Linux kernel.
- Add HUK derivation support for ELE AHAB.
Wrap all the i.MX specific options in MACH_IMX, otherwise they keep
showing up in other SoC vendor configurations. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Staticize intpll_configure(). Add weak board_imx_intpll_override()
function which can be defined at board level to override specific
PLL frequency settings early during boot. This can be used to for
example force faster CPU core clock frequency if the hardware can
handle it.
Example of increasing CPU core clock to 1600 MHz on i.MX8M Plus:
```
int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
{
if (pll == ANATOP_ARM_PLL)
*freq = MHZ(1600);
return 0;
}
```
Signed-off-by: Marek Vasut <marex@denx.de>
In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS
driver in board_init_f().
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Instead of using the local imx6sl-evk, imx6sl-pinfunc.h and
imx6sl.dtsi devicetree copies from U-Boot, convert the imx6sl-evk board
to OF_UPSTREAM so that the upstream kernel devicetree can be used instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Add a new ahab_derive command that derives the hardware unique key (HUK)
into a 16 or 32 bytes key and stores it at the given address.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Ye Li <ye.li@nxp.com>
doc/develop/makefiles.rst has the following note:
if_changed should not be used more than once per target.
It stores the executed command in a corresponding .cmd
file and multiple calls would result in overwrites and
unwanted results when the target is up to date and only the
tests on changed commands trigger execution of commands.
The mach-imx Makefile does not follow this recommandation, so fix it
by implementing a single command that performs both the cpp_cfg
and imx9_check actions.
This change fixes an issue with "tools/buildman/buildman imx8ulp_evk"
failing every other time [1].
[1] https://lists.denx.de/pipermail/u-boot/2024-August/563192.html
Fixes: f637dfe8c4 ("mach-imx: Add i.MX93 binman support.")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
The sandbox pinmux driver is used in the non-test devicetree as well as
the test one. I didn't realize this when I modified the driver for
tests, and so broke the regular use case (which only resulted in
warnings). First, making the pinmux and the UART group available
pre-relocation to avoid ENODEV errors. Then, convert the pin groups and
functions to the new style, adding onewire group as well.
Fixes: 7f0f1806e3 ("test: pinmux: Add test for pin muxing")
Closes: https://source.denx.de/u-boot/u-boot/-/issues/2
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jonathan Humphreys <j-humphreys@ti.com> says:
Upstream DTS added explicit ranges to the fss node. It did not include
the 32 bit memory space needed by the R5 to access OSPI. With the
upstream DTS sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, these patches can be removed.
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Upstream DTS added explicit ranges to the fss node. It did not include the
32 bit memory space needed by the R5 to access OSPI. With the upstream DTS
sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
0c0e03ec22 (arm64: dts: ti: k3-j721e: Use exact ranges for FSS node)
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Upstream DTS added explicit ranges to the fss node. It did not include the
32 bit memory space needed by the R5 to access OSPI. With the upstream DTS
sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
0c0e03ec22 (arm64: dts: ti: k3-j721e: Use exact ranges for FSS node)
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Upstream DTS added explicit ranges to the fss node. It did not include the
32 bit memory space needed by the R5 to access OSPI. With the upstream DTS
sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f00e626085 (arm64: dts: ti: k3-j7200: Use exact ranges for FSS node)
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Upstream DTS added explicit ranges to the fss node. It did not include the
32 bit memory space needed by the R5 to access OSPI. With the upstream DTS
sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f062a015f4 (arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node)
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Upstream DTS added explicit ranges to the fss node. It did not include the
32 bit memory space needed by the R5 to access OSPI. With the upstream DTS
sync, OSPI boot no longer works.
Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f062a015f4 (arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node)
Fixes: 5024a96db8 ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
The early malloc region is normally quite small and is certainly less
than 4GB, so use a 32-bit value for the limit and pointer. Update the
comments for clarity while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The bus clock and memory clock are unlikely to go above 4GHz for now, so
reduce the field size to 32 bits.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a function to locate this information, rather than doing it
automatically on startup, to save space in global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't need a full word for this boolean value. Convert it into a flag
to save space in global_data.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Only m68k and powerpc use this field, so move it to the arch-specific
info, to reduce the size for other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having every caller set this up individually, create a
common init function. This allows new fields to be added without the
risk of them being left uninited.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Make the raw-mode options depend on SPL_SYS_MMCSD_RAW_MODE in a more
direct way. This makes it easier to understand the options with
'make menuconfig'.
There are three different ways of specifying the offset:
- sector offset
- partition number
- partition type
So make these a choice, so it is more obvious what is going on.
Update existing boards to enable SPL_SYS_MMCSD_RAW_MODE where needed.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than repeating the same code in two files (SPL and TPL), move it
to a shared filed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Currently, the bmode command only supports booting from ecspi1.
Expand it to also support booting from ecspi3.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
With DM_SERIAL in place, there is no need to setup the UART pins
in the board code.
The UART pins are setup via devicetree, thanks to DM.
Remove the unneeded code.
Signed-off-by: Fabio Estevam <festevam@denx.de>
