Implement exfat_fs_rename() to rename or move files. This is used
by the 'mv' generic FS interface command. The rename implementation
for other filesystems was added recently and was not part of exfat
porting layer due to merge issue, which made 'mv' command crash,
fix this by adding the missing implementation.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Add test for the 'test -e' command to check for existence of files.
This exercises struct fstype_info .exists callback.
Signed-off-by: Marek Vasut <marex@denx.de>
The exfat_fs_exists() should return 0 in case the path does not exist,
and 1 in case the path does exist. Fix the inverted return value. This
fixes 'test -e' command with exfat.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
The exfat_fs_readdir() depends on state created in exfat_fs_opendir(),
but that state may be disrupted by fs_close() called by the FS layer
in fs_opendir(), because exfat porting layer unmounts the filesystem
in ->close() callback.
To avoid this disruption, avoid creating state in exfat_fs_opendir(),
cache only the directory name to list there, and rework exfat_fs_readdir()
to work in a similar way to exfat_fs_ls(). That is, make exfat_fs_readdir()
open the directory, look up specific entry, extract its properties to be
reported to FS layer, and close the directory. This is slow, but avoids
the disruption. The slowness does not affect regular 'ls' command, which
uses exfat_fs_ls() fast path.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Write into a bogus file, like '/.', triggers an "impossible"
print from the exfat core code. That should not be printed
in U-Boot, because U-Boot prints its own error message sooner.
Inhibit this error message.
The following command triggers the bogus print:
"
=> save host 0:0 1000008 /. 0x10
"
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
Make sure the node is never dirty before being released, flush
the node first using exfat_flush_node() and only then release
the node using exfat_put_node(). This now matches the behavior
of exfat_fs_write() too.
Fixes: b86a651b64 ("fs: exfat: Add U-Boot porting layer")
Signed-off-by: Marek Vasut <marex@denx.de>
This was applied prematurely by me as I missed the feedback provided at
the time.
This reverts commit c9c8df2c37.
Signed-off-by: Tom Rini <trini@konsulko.com>
Updates for RPi for 2025.07:
- copy over uart clock-frequency in DT
- always set fdt_addr with firmware-provided FDT address
- Set bootm_size to 512MB
- Drop fdt_high and initrd_high
- Update environment to support booti and large initrd
MIPS_RELOCATION_TABLE_SIZE=0x8000 is too small to enable UNIT_TEST.
Increase it by 50 % (16 KiB).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Since commit f98cd471f0 ("clk: clk-composite: Resolve parent clock by
name") the StarFive VisionFive 2 board fails to boot.
Before that patch the SPL debug UART showed warnings like:
clk_register: failed to get pll0_out device (parent of perh_root)
clk_register: failed to get pll0_out device (parent of qspi_ref_src)
clk_register: failed to get pll0_out device (parent of usb_125m)
clk_register: failed to get pll0_out device (parent of gmac_src)
clk_register: failed to get pll0_out device (parent of gmac1_gtxclk)
clk_register: failed to get pll0_out device (parent of gmac0_gtxclk)
The &pllclk clock needs to be enabled early.
Fixes: f98cd471f0 ("clk: clk-composite: Resolve parent clock by name")
Suggested-by: Marek Vasut <marex@denx.de>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Use only a single -machine parameter.
Describe that the same invocation of qemu-system-<arch> has to be
used for dumping the device-tree as will be used when executing U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The EFI selftest should match executing a real EFI binary
as closely as possible.
Use do_bootefi_exec() to enter the EFI selftest.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To avoid the problem fixed in commit 57a95d522ca8 ("doc: release_cycle:
fix next release version") moving forward, make use of the variable
substitution feature of rST. This adds a next_ver variable and
references it in all of the places where I had been listing the version
being worked on.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
As the system table already has pointers to the Simple Text Input and
Output Protocols we can directly use these instead of calling
OpenProtocol.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The PIT timer needs to be available early in the SPL phase,
otherwise SPL fails to boot and only prints:
Could not initialize timer (err -96)
Fix this problem by passing 'bootph-all' to the sama5d2 PIT node.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Rather than maintaining custom hush scripting to boot the SDK, migrate
to a 'standard boot' method which simplifies maintenance and enables
multiple distributions to use this evaluation module.
Signed-off-by: Bryan Brattlof <bb@ti.com>
CU_CLKOUT0 can be driven by two input clocks: a 25 MHz and a 50 MHz source.
Currently, the 25 MHz option is not selectable due to an incorrect mux
configuration where the 50 MHz clock is duplicated in the parent list.
This patch fixes the mux setup, allowing proper selection of the 25 MHz
clock source for MCU_CLKOUT0.
Similar configuration is already correctly implemented in AM62 clock
data for 'hsdiv4_16fft_main_2_hsdivout1_clk10', where MCU_CLKOUT0
parent switching behaves as expected.
Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62px/clocks.html#clocks-for-board0-device
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Christian Marangi <ansuelsmth@gmail.com> says:
This is continuation of the initial patchset for airoha
support.
Some are trivial fix for spi.
A new concept to setup SPI from detected NAND.
Sadly DTS node still need to be merged upstream so we
are currently adding them to u-boot dtsi and it's planned
to be dropped once they are accepted in upstream kernel.
Link: https://lore.kernel.org/r/20250407200208.25594-1-ansuelsmth@gmail.com
Add Airoha SPI NAND driver to permit usage of attached SNAND on the
Airoha AN7581 SoC. While SPI controller supports DMA transation, due to
U-Boot limitation we currently limit it to single command in Manual
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Call SPI setup_for_spinand() if supported and defined to configure the
SPI slave for the attached NAND. This is needed to configure the SPI
with the NAND page size and spare size for correct configuration of the
device.
Call it as soon as the NAND is detected to correctly handle SPI
controller with select_op_variant detection.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
A common device attached to SPI are SPI NAND and some device might
require to have info on the attached NAND to know the flash page size
and spare size.
To support this, introduce setup_for_spinand() that pass the attached
spinand info from manufacturer.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[trini: Switch to forward declaration of struct spinand_info]
Signed-off-by: Tom Rini <trini@konsulko.com>
Drop unneeded spi.h header include from spinand.h, nothing included by
spi.h is actually used in this header and .c should correctly included
spi.h if actually needed.
Replace spi.h with linux/bitops.h as this is what is actually required
for spinand.h
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Port Linux kernel regmap_set/clear_bits shorthands to set and clear bits
in a regmap. These are handy if only specific bits needs to be applied
or cleared and makes it easier to port regmap based driver from kernel
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support
for it in default images.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add eMMC nodes with the fixed regulator and fixed clock. It's also
needed to assign the clock and set it to 200MHz as it's set to 150Mhz by
default.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Airoha new SoC implement the same Mediatek driver for MMC. Permit to
also build for Airoha arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly
rewritten and simplified version of the Linux airoha_eth.c driver.
It's has been modified to support a single RX/TX ring to reflect U-Boot
implementation with recv and send API.
The struct and the define are kept as similar as possible to upstream
one to not diverge too much.
The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x
but doesn't require any modification aside from setting the CPU port and
applying the Flood configuration hence it can be handled entirely in the
Ethernet driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.
The driver uses two firmware files, for which updated versions are added to
linux-firmware already.
Based on the Linux upstream 8811 driver code(air_en8811h.c),
I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.
The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini,
and it is loaded from there.
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Line 171 in README is describing that before relocation no code
should use global variable because global variables are placed
to BSS section which is initialized to 0 after relocation.
In the case of ZynqMP, where DTB reselection is enabled, the EEPROM
is read again after relocation. This prevents the issue from being
observed. However, in Versal Gen 2, where DTB reselection is also
enabled, the EEPROM is not read after relocation because it is not
yet wired in board_init(). This leads to a situation where the code
accesses an incorrect memory location, because none is really
checking the board_info is valid or not. To fix, move the board_info
into the data section and also check whether it is valid or not.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162553.588285-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
