Commit Graph

99891 Commits

Author SHA1 Message Date
Vincent Stehlé
2dc04803b0 efi_loader: handle malloc() errors
The new_packagelist() function of the HII Protocols implementation is
calling malloc() without checking its return code; fix this.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:25:27 +02:00
Ilias Apalodimas
f5e0f2198e efi_loader: Print extra information from the bootmgr
Instead of just printing the label, add information for the Device
path as well so it's easier to see if we are booting from disk, network
etc

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:25:24 +02:00
Varadarajan Narayanan
742aa8b039 efi_loader: Handle GD_FLG_SKIP_RELOC
If the EFI runtime services pointers are relocated even though
relocation is skipped, it corrupts some other data resulting in some
unexpected behaviour.

In this specific case, it overwrote some page table entries resulting in
the device memory address range's mappings getting removed. Eventually,
after the completion of efi_runtime_relocate(), when a driver tries to
access its device's registers it crashes since the mappings are absent.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:24:06 +02:00
Christian Kohlschütter
85403c46e6 efi: Fix efiboot for payloads loaded from memory
Calling bootefi on an address that was loaded from memory (e.g., cramfs
or SPI flash via "sf read", etc.), currently results in the EFI binary
not being able to access the EFI image device path.

For example, iPXE would fail with an error "EFI could not get loaded
image's device path: Error 0x7f39e082 (https://ipxe.org/7f39e082)".

This is due to an incomplete special-case in efi_binary_run, where a new
device path was created but not used in all required places.

Fix the in-memory special case, set the "bootefi_device_path" to the
generated "file_path".

iPXE will now boot, and report the device path as
"/MemoryMapped(0x0,0xSTART,0xLEN)"

Signed-off-by: Christian Kohlschütter <christian@kohlschutter.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-11 13:20:38 +02:00
Michal Simek
70d5f6e21e cmd: fwu: Dump custom fields from mdata structure
The commit cb9ae40a16 ("tools: mkfwumdata: add logic to append vendor
data to the FWU metadata") added support for adding vendor data to mdata
structure but it is not visible anywhere that's why extend fwu command to
dump it.

Tested-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-04-11 13:20:38 +02:00
Adriano Cordova
3d8e1b7b2d bootm: add support for initrd in do_bootm_efi
Pass a pointer to a memory mapped initrd and its size to
efi_binary_run. The EFI stack will register an EFI_LOAD_FILE2_PROTOCOL
for the next boot stage to access this initrd.

Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:20:38 +02:00
Adriano Cordova
36835a9105 efi_loader: binary_run: register an initrd
Add support to install an initrd when running an EFI binary
with efi_binary_run

Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:20:38 +02:00
Adriano Cordova
73c9a35270 efi_loader: efi_load_initrd: provide a memory mapped initrd
U-Boot can pass an initrd to subsequent boot stages via the
EFI_LOAD_FILE2_PROTOCOL. The current implementation only supports
this functionality via the efi boot manager: the initrd is taken
from the load options of the BootCurrent variable. This commit adds
support for registering a memory mapped initrd, e.g. loaded from a
FIT image. For now this new method takes precedence over loading the
initrd from the BootCurrent variable (if both are present) because
the BootCurrent variable is not cleared on exiting the boot manager.

Signed-off-by: Adriano Cordova <adriano.cordova@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:20:37 +02:00
Pawel Kochanowski
e8660b23f4 efi: Make FDT extra space configurable
U-Boot currently reserves only 0x3000 bytes when copying the FDT
in copy_fdt(), which may not be sufficient if additional nodes
(such as FMAN firmware) are added later.

This patch uses the exisitng SYS_FDT_PAD to reserve space for FDT fixup
instead of hardcoded value.

This change prevents potential corruption when resizing FDT after
EFI boot, especially when firmware like FMAN requires additional
space.

Signed-off-by: Gabriel Nesteruk <gnesteruk@sii.pl>
Signed-off-by: Pawel Kochanowski <pkochanowski@sii.pl>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-11 13:20:37 +02:00
Simon Glass
7b269a2bd6 efi_loader: Install the ACPI table from the bloblist
When BLOBLIST_TABLES is used, the ACPI tables are not currently added to
the list of EFI tables. While we don't want to create a new memory
region, we do want to tell EFI about the tables.

Fix this by covering this case. At some point the non-bloblist code can
likely be removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 3da59ee9579 ("efi_loader: Avoid mapping the ACPI tables twice")
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2025-04-11 13:20:37 +02:00
Jonathan Humphreys
6f7fb8d29f board: remove capsule update support in set_dfu_alt_info()
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so remove the function entirely.

Fixes: a9e6f01a94 ("efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for board/libre-computer/*
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # for
2025-04-11 13:20:37 +02:00
Jonathan Humphreys
546152624f efi_firmware: set EFI capsule dfu_alt_info env explicitly
The current implementation of EFI capsule update uses set_dfu_alt_info() to
set the dfu_alt_info environment variable with the settings it requires.
However, set_dfu_alt_info() is doing this for all DFU operations, even
those unrelated to capsule update.

Thus other uses of DFU, such as DFU boot which sets its own value for the
dfu_alt_info environment variable, will have that setting overwritten with
the capsule update setting. Similarly, any user defined value for the
dfu_alt_info environment variable would get overwritten when any DFU
operation was performed, including simply performing a "dfu 0 list"
command.

The solution is stop using the set_dfu_alt_info() mechanism to set the
dfu_alt_info environment variable and instead explicitly set it to the
capsule update's setting just before performing the capsule update's DFU
operation, and then restore the environment variable back to its original
value.

This patch implements the explicit setting and restoring of the
dfu_alt_info environment variable as part of the EFI capsule update
operation.

The fix is fully implemented in a subsequent patch that removes the capsule
update dfu_alt_info support in set_dfu_alt_info().

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:20:37 +02:00
Michal Simek
4e669d5984 xilinx: dfu: Fill directly update_info.dfu_string
Directly fill update_info.dfu_string to prepare platforms to switch
from using dfu_alt_info variable to dfu_string which contains description
for capsule update when switch is done.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-11 13:20:37 +02:00
Luke Wang
7550bfdbf4 mmc: mmc_boot: Support Sandisk and Micron eMMC BOOT/RPMB hardware partition resizing
Current mmc bootpart-resize command only support Samsung eMMC BOOT/RPMB
hardware partition resizing. Add Sandisk and Micron eMMC BOOT/RPMB hardware
partition resizing support. The commands and parameters for resizing
partitions are different for each manufacturer. Select the corresponding
function according to CID.

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:51:04 +08:00
Simon Glass
d99f8d2d74 mmc: Avoid uniniting twice
Each MMC device has a child which ihs a block device. At present we call
mmc_deinit() when the block device is removed.

But the MMC struct (i.e. struct mmc) is attached to the MMC's device,
not its child.

So at present, when an MMC device is removed, mmc_deinit() is called
twice, once for the MMC device and once for its block device. This
results in a double call to cyclic_unregister().

Fix this by adding a 'remove' method to the uclass and calling
mmc_deinit() from there.

Also drop the call to device_probe() within the block-device's probe()
method. The device is already in the process of being probed, so this
call does nothing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c822c1a50b ("mmc: call device_probe() after scanning")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:49:51 +08:00
Jonas Karlman
2057bb4b51 mmc: sdhci: Fix possible Synchronous Abort using PIO mode
When MMC_SDHCI_SDMA=y or MMC_SDHCI_ADMA=y and PIO mode is used
dma_unmap_single() is called on an unmapped address, 0x0. This may
result in a Synchronous Abort:

  ## Checking hash(es) for Image atf-1 ... sha256+ OK
  CMD_SEND:16
                  ARG                      0x00000200
                  MMC_RSP_R1,5,6,7         0x00000900
  CMD_SEND:18
                  ARG                      0x00004005
  "Synchronous Abort" handler, esr 0x96000147
  elr: 00000000400015bc lr : 0000000040012b4c
  x 0: 0000000000008000 x 1: 0000000000092600
  x 2: 0000000000000040 x 3: 000000000000003f
  x 4: 0000000000000030 x 5: 0000000000000001
  x 6: 0000000000000001 x 7: 0000000000000000
  x 8: 000000000000000a x 9: 0000000000000090
  x10: 0000000043dffc68 x11: 0000000043c00440
  x12: 0000000043c00440 x13: ffffffffbfe00000
  x14: 000000000000031c x15: 0000000240000000
  x16: 000000004001145c x17: 0000000000000032
  x18: 0000000043dffef0 x19: 0000000043c00000
  x20: 0000000043dffbc8 x21: 0000000000000000
  x22: 00000000000f3d95 x23: 0000000000000002
  x24: 0000000000000493 x25: 0000000000092600
  x26: 0000000000000001 x27: 0000000000000001
  x28: 0000000000000008 x29: 0000000043dffab0

  Code: d2800082 9ac32042 d1000443 8a230000 (d5087620)
  Resetting CPU ...

  resetting ...

Fix this by only dma_unmap_single() when DMA mode is used and
sdhci_prepare_dma() has been called to map host->start_addr.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:49:27 +08:00
Peng Fan
674a0498e9 mmc: Optimize eMMC erase speed
Per JESD84-B51 6.6.9 Erase:
The host can erase a contiguous range of Erase Groups. Starting the erase
process is a three steps sequence. First the host defines the start address
of the range using the ERASE_GROUP_START (CMD35) command, next it defines
the last address of the range using the ERASE_GROUP_END (CMD36) command and
finally it starts the erase process by issuing the ERASE (CMD38) command
with argument bits set to zero. See Table 11 for the arguments supported by
CMD38.  The address field in the erase commands is an Erase Group address,
in byte units for densities up to 2GB, and in sector units for densities
greater than 2GB. The Device will ignore all LSB's below the Erase Group
size, effectively rounding the address down to the Erase Group boundary.

So choose 2GB bytes as check condition.

If the erase size is larger that 2GB, use 2GB to avoid breaking non high
capacity cards. If erase size is less than 2GB and larger than a grp, use
'grpcnt * mmc->erase_grp_size' to cover all the sectors, else use
the number of sectors.

With test erasing 20GB eMMC

board:  Evk_8ulp Evk_8mm   Evk_8mn             Evk_8mp   Mek_8qxpc0 Mek_8qm
			   kingston  sandisk
before: 37.683s   112.738s  129.365s  28.238s   112.605s  500.470s  490.708s
after:  0.093s    0.111s    0.951s    0.080s    0.121s    6.960s    6.915s

Tested-by: Faqiang Zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:48:53 +08:00
Marek Vasut
fcef00c284 mmc: Exit from mmc_init() if mmc_complete_init() fails
In case mmc_complete_init() returns error, exit from mmc_init()
without possibly calling cyclic_register(), which at that point
would be undesired.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:46:35 +08:00
Marek Vasut
4357167e0e mmc: Simplify poll CD logic in case cyclic framework is enabled
Simplify 90cc07fd78 ("mmc: Poll CD in case cyclic framework is enabled")
according to suggestions by Rasmus. The struct cyclic_info is zero-size in
case CONFIG_CYCLIC is not enabled and does not add any size to struct mmc,
so it can unconditionally be part of that structure. This allows clean up
of all the other conditionals in mmc.c which can now be unconditionally
present, as they also add no extra space.

Suggested-by: Rasmus Villemoes <ravi@prevas.dk>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:45:50 +08:00
Tom Rini
53bb8fdea1 mmc: Kconfig: Correct dependencies SDHCI ADMA options
The option MMC_SDHCI_ADMA_FORCE_32BIT is only tested or used when
MMC_SDHCI_ADMA or SPL_MMC_SDHCI_ADMA is enabled. And for
MMC_SDHCI_ADMA_64BIT the same is true except we also require
MMC_SDHCI_ADMA_FORCE_32BIT to be disabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2025-04-11 11:45:05 +08:00
Varadarajan Narayanan
7dd49a9264 drivers: scsi: Add 'erase' support
UFS devices uses the block and scsi frameworks. Enable UFS erase
support by adding erase support to SCSI.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
2025-04-10 20:55:53 -06:00
Varadarajan Narayanan
6a5177a58c dm: blk: Add 'erase' generic block device commands
Add support for doing 'erase' using the generic block commands
framework.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
2025-04-10 20:55:53 -06:00
牛 志宏
157119d69a bootm: Support load images when os is elf
This extends the bootm command to allow find images when os type is elf.

Signed-off-by: Niu Zhihong <zone.niuzh@hotmail.com>
2025-04-10 20:55:53 -06:00
Daniel Golle
9c79c8fe70 tools/fit_check_sign: make key optional
Allow invoking fit_check_sig without the key parameter, allowing to
validate only checksums and hashes for unsigned images.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2025-04-10 20:55:53 -06:00
Daniel Golle
40dcd5088b image-fit-sig: skip in tools build if key is missing
Skip signature verification in case no public key was given in order to
allow using fit_check_sign also to validate uImage.FIT images without
signatures. Guarded by USE_HOSTCC macro the behavior on target is
unchanged.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2025-04-10 20:55:53 -06:00
牛 志宏
2a6d7ad24d bootm: Add support for passing arguments to elf app
This extends the bootm command to allow passing arguments to standalone
ELF applications.

Signed-off-by: Niu Zhihong <zone.niuzh@hotmail.com>
2025-04-10 20:55:52 -06:00
Xu Zhang
7c9f8680c1 armv8: start.S: Subordinate CPUs psci setup vector
As current design, only Manager CPU called armv8_setup_psci() before
jump to next stage(such as Linux Kernel), Subordinate CPUs also need
setup psci vector to handle trap request which comes from higher EL
level.

Signed-off-by: Xu Zhang <423756212@qq.com>
[trini: Guard with !CONFIG_XPL_BUILD check]
2025-04-10 20:55:39 -06:00
Miquel Raynal
f86a377f1f video: imx: Add LCDIF driver
Add support for the LCD interfaces (LCDIF1/2). When probed, these
interfaces request numerous clocks and power domains, attach the bridge
and look for a panel in order to retrieve its capabilities and
properties.

There is a similar existing driver in the upper folder for other i.MX
targets, I discovered this driver a bit late. It is not targeting the
i.MX8MP and I have no idea how different can the LCDIF be on this SoC,
but I did not manage to get it work, especially because it is not fully
compliant with the device-model, especially on the clocks/power
management side which is all ad-hoc. This is normal though, it was
contributed more than ten years ago.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
dce8222eea video: imx: Add LDB driver
Add support for the LVDS Display Bridge (LDB) found on i.MX8MP.

When attached, the bridge driver looks for panels connected to one of
its two outputs and adapts its own configuration to use them. There is
currently no support for merged/split displays.

Note regarding the clock configuration:
The LDB output clock should be absolutely identical to the LCDIF output
clock so both blocks can talk to each other synchronously. However, the
LDB clock has an internal divisor of 7 (respectively 3.5 in dual
configuration) which means the LDB input clock must be explicitly set
once we know the configuration.

This driver was tested on i.MX8MP using a single panel connected to the
LVDS2 interface.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
95654e6717 video: imx: Fix Makefile in order to be able to add other imx drivers
The IPUv3 is one IP part of the imx world, there are others, and
selecting the whole imx/ folder based on such a specific Kconfig symbol
is sub-optimal. Let's always enter the imx/ folder, and then selectively
compile parts of the folder based on the configuration.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
c05e7c8cf7 imx: power-domain: Add support for the MEDIAMIX control block
This block delivers power and clocks to the whole display and rendering
pipeline.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
17c42bf459 imx: power-domain: Describe the i.MX8 MEDIAMIX domain
Add support for the i.MX8 MEDIAMIX domain which is driving the power
over the whole display/rendering pipeline.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
e05d706ff6 clk: imx8mp: Add media related clocks
These are all the clocks needed to get an LCD panel working, going
through one of the LCDIF and the LDB. The media AXI and APB clocks are
also described.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:56 -03:00
Miquel Raynal
ac30d90f33 clk: Ensure the parent clocks are enabled while reparenting
Reparenting a clock C with a new parent P means that C will only
continue clocking if P is already clocking when the mux is updated. In
case the parent is currently disabled, failures (stalls) are likely to
happen.

This is exactly what happens on i.MX8 when enabling the video
pipeline. We tell LCDIF clocks to use the VIDEO PLL as input, while the
VIDEO PLL is currently off. This all happens as part of the
assigned-clocks handling procedure, where the reparenting happens before
the enable() calls. Enabling the parents as part of the reparenting
procedure seems sane and also matches the logic applied in other parts
of the CCM.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:55 -03:00
Miquel Raynal
197376fbf3 power-domain: Add refcounting
It is very surprising that such an uclass, specifically designed to
handle resources that may be shared by different devices, is not keeping
the count of the number of times a power domain has been
enabled/disabled to avoid shutting it down unexpectedly or disabling it
several times.

Doing this causes troubles on eg. i.MX8MP because disabling power
domains can be done in recursive loops were the same power domain
disabled up to 4 times in a row. PGCs seem to have tight FSM internal
timings to respect and it is easy to produce a race condition that puts
the power domains in an unstable state, leading to ADB400 errors and
later crashes in Linux.

CI tests using power domains are slightly updated to make sure the count
of on/off calls is even and the results match what we *now* expect.

As we do not want to break existing users while stile getting
interesting error codes, the implementation is split between:
- a low-level helper reporting error codes if the requested transition
  could not be operated,
- a higher-level helper ignoring the "non error" codes, like EALREADY and
  EBUSY.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:55 -03:00
Miquel Raynal
7478d04e60 test: dm: test-fdt: Add checks for uclass_get_device_by_endpoint()
This is a new DM core helper. There is now a graph endpoint
representation in the sandbox test DTS, so we can just use it to verify
the helper proper behavior.

Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:55 -03:00
Miquel Raynal
04fcddac28 dm: core: Add a helper to retrieve devices through graph endpoints
There are already several helpers to find a udevice based on its
position in a device tree, like getting a child or a node pointed by a
phandle, but there was no support for graph endpoints, which are very
common in display pipelines.

Add a new helper, named uclass_get_device_by_endpoint() which enters the
child graph reprensentation, looks for a specific port, then follows the
remote endpoint, and finally retrieves the first parent of the given
uclass_id.

This is a very handy and straightforward way to get a bridge or a panel
handle.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:55 -03:00
Miquel Raynal
9fe367bb60 dm: doc: Fix example
`.priv_data_size` does not exist. I believe the actual structure member
was supposed to be `.priv_auto`.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-04-10 22:32:55 -03:00
Miquel Raynal
250a382a89 core: ofnode_graph: Fix a comment
Naming between the parameter list, the prototype and the main comment do
not match. Fix the comment which seems the be the one that is incorrect.

Fixes: 9057077cf4 ("core: ofnode: add of_graph parsing helpers")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-10 22:32:55 -03:00
Andre Przywara
82f5ce11e6 common: console: move break; statement
In console_setfile(), there is some #ifdef'ed code, updating monitor
functions for a U-Boot proper build. This is called inside a switch/case
statement, but the closing "break;" is inside the #ifdef section.
This doesn't look right: we should not fall through to the error case
for an SPL/TPL build.

Move the "break" to be always effective, solving a compiler warning about
an untagged implicit fallthrough.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-10 16:16:39 -06:00
Tom Rini
cb7555e930 Merge patch series "*** Add Ethernet boot support for AM62Ax + phyCORE-AM62 SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:

Add general ethernet boot support for AM62Ax SoC.
Some of the work is based on TI's downstream u-boot patches found in
[1], patches touching code in mach-k3 and *.yaml board config files.

Also, provide defconfigs and device tree changes for phyCORE-AM62x and
phyCORE-AM62Ax to support booting via ethernet.

[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem

Link: https://lore.kernel.org/r/20250325035824.2304200-1-w.egorov@phytec.de
2025-04-10 15:04:09 -06:00
Wadim Egorov
e41c21acce configs: Add phycore_am62ax_r5_ethboot_defconfig
Provide a defconfig for booting the phycore-am62ax via Ethernet.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Nathan Morrisson
5327b62c12 board: phytec: phycore_am62ax: Share ethernet resources with boot r5 core
During the U-Boot SPL R5 boot stage the code is running on the MAIN R5
core, which means a host ID of 36 is used for DM/TIFS communication,
see [1]. In order to enable Ethernet boot update the DMA resources used
to be shared with the MAIN R5 core instead of the MCU R5 core.

[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62ax/hosts.html

Based on patch 19 from https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Andreas Dannenberg
a0f73e847d arch: arm: mach-k3: r5: am62ax: Update SoC auto-gen data to enable CPSW boot
This data was generated using the ksswtool-autogen project with the
followig commit:

eed7492 ("soc: am62ax: Add cpsw_3guss_main_0 id to the dev list")

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Nathan Morrisson
2dec0fc59c arch: arm: mach-k3: am62a7: Probe CPSW NUSS in board_init_f()
Probe CPSW NUSS in am62a7 board_init_f() to support ethernet boot.

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Daniel Schultz
77183dfbbc arch: arm: dts: k3-am62a7-phyboard-lyra-rdk-u-boot: Disable Ethernet2
Don't initialize Ethernet2 in SPL. We cannot boot from that source anyways
and it throws an error during boot.

This will remove following error message during network boot:

Error: ethernet@8000000port@2 No valid MAC address found.ethernet@8000000port@1
Waiting for PHY auto negotiation to complete....... done

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Wadim Egorov
93d22aca3d configs: phycore_am62x_a53_defconfig: Update for ethernet boot
Add support for ethernet boot in the A53 SPL. Increase the SPL Size
limit and update SPL_STACK_R_ADDR.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Wadim Egorov
1acffb5711 configs: Add phycore_am62x_r5_ethboot_defconfig
Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-04-10 15:03:32 -06:00
Wadim Egorov
a936352f9e arm: dts: k3-am625-phyboard-lyra-rdk: Add boot phase tag to phy_gmii_sel
Add bootph-all tag to phy_gmii_sel node. This is needed for booting via
Ethernet. While at it, drop main_pktdma reg redefinitions which are already
provided by the top-level SoC device tree file.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
2025-04-10 15:03:32 -06:00
Tom Rini
d82f7bc94c Merge patch series "scsi: ensure writes are flushed to disk"
Caleb Connolly <caleb.connolly@linaro.org> says:

SCSI devices like UFS may maintain their own cache to speed up writes,
however this is lost on board reset (and may be lost on device removal
or reset by OS drivers).

Currently this can be worked around by "waiting for a while" after
writing data to disk, but of course this is not an acceptable solution.

Ideally U-Boot would have a mechanism to flush caches during board
reset, but until that logic is hooked up let's be sure that all writes
are actually propagated to the storage device so that we don't lose data
on board reset.

The same logic was already implemented just for the AHCI backend, this
duplicated logic has been removed and support for the SYNC_CACHE command
is added to AHCI.

This is particularly noticeable during capsule updates, since the update
file is deleted and the board is reset immediately afterwards which
resulted in the same capsule update being applied over and over again.

This specifically fixes Qualcomm SDM845 devices with UFS 2.1, but likely
all UFS devices that use a cache.

Link: https://lore.kernel.org/r/20250326-scsi-sync-on-write-v2-0-12ab05bd464b@linaro.org
2025-04-10 14:21:46 -06:00