David Lechner
ecea053c46
clk: mediatek: mt8516: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-14-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:18 -05:00
David Lechner
93a3f1677b
clk: mediatek: mt8512: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-13-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:14 -05:00
David Lechner
c15c522fa3
clk: mediatek: mt8365: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-12-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:11 -05:00
David Lechner
7c95a2a95c
clk: mediatek: mt8195: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-11-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:08 -05:00
David Lechner
bd54772439
clk: mediatek: mt8188: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-10-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:04 -05:00
David Lechner
999c169c35
clk: mediatek: mt8183: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-9-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:04:01 -05:00
David Lechner
e60c459757
clk: mediatek: mt7988: convert CLK_XTAL to CLK_PAD_CLK40M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.
This will eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-8-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:58 -05:00
David Lechner
b8189e6e14
clk: mediatek: mt7987: convert CLK_XTAL to CLK_PAD_CLK40M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.
This will eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-7-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:55 -05:00
David Lechner
7ad6dab0dc
clk: mediatek: mt7986: convert CLK_XTAL to CLK_PAD_CLK40M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.
This will eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-6-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:51 -05:00
David Lechner
ca0d2abc27
clk: mediatek: mt7981: convert CLK_XTAL to CLK_PAD_CLK40M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.
This will eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-5-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:48 -05:00
David Lechner
57a3c93336
clk: mediatek: mt7629: convert CLK_XTAL to CLK_PAD_CLK40M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.
This will eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-4-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:45 -05:00
David Lechner
284025cc6e
clk: mediatek: mt7623: convert CLK_XTAL to CLK_PAD_CLK26M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-3-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:40 -05:00
David Lechner
bd07ed2064
clk: mediatek: mt7622: convert CLK_XTAL to CLK_PAD_CLK25M
...
Replace all uses of CLK_XTAL with CLK_PAD_CLK25M.
This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-2-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:36 -05:00
David Lechner
39b6394831
clk: mediatek: replace xtal2_rate with struct mtk_parent
...
Replace the hard-coded xtal rate for PLL parents with struct mtk_parent.
This avoids declaring the same clock rate in multiple places and will
allow future drivers to use an arbitrary clock.
The variable is renamed to something that better indicate what the field
is actually used for.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-1-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 11:03:29 -05:00
Tom Rini
075bd023c7
Merge tag 'qcom-fixes-24Mar2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
...
- Assorted Qualcomm platform fixes
2026-03-24 09:15:03 -06:00
David Lechner
6bbfa8fba5
clk: mediatek: mt8195: use ext_clock_rates
...
Convert the mt8195 clock driver to use ext_clock_rates.
Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.
The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-2-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:47:15 -05:00
David Lechner
f7d48558cf
clk: mediatek: mt8188: use ext_clock_rates
...
Convert the mt8188 clock driver to use ext_clock_rates.
Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.
The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-1-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:47:15 -05:00
David Lechner
de935cb519
clk: mediatek: mt8365: drop topckgen map
...
Drop the clock ID map for MT8365 TOPCKGEN clocks.
Previously, we didn't have the EXT clock feature, so we needed the map.
Now we can replace it with the new feature to avoid the map.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260303-mtk-clk-8365-drop-map-v1-1-17f81c375290@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:47:15 -05:00
David Lechner
256499eebf
clk: mediatek: refactor duplicate *_mux_get_rate()
...
Refactor two identical functions for getting mux clock rates. The
functions are renamed and moved to the section of the code that contains
other common functions.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-16-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
84c89c2529
clk: mediatek: remove CLK_PARENT_MIXED flag
...
Remove CLK_PARENT_MIXED and all dead code paths related to it.
All mux clocks have been converted to use struct mtk_parent (the
parent_flags field of the parent/parent_flags union). Use of this
struct was indicated by CLK_PARENT_MIXED. Now, this is always the case
and we can drop the flag and the union. All MUX_MIXED* macros are
change to use the equivalent MUX* macros since we no longer need to
set the flag.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-15-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
a56b24bf58
clk: mediatek: remove use of CLK_BYPASS_XTAL flag
...
Remove the CLK_BYPASS_XTAL flag completely.
It was a bit of a hack that was meant to handle mux clocks that had
mixed parents (e.g. XTAL and TOPCKGEN). The idea was that if you didn't
have CLK_XTAL as a parent, then you were supposed to add the
CLK_BYPASS_XTAL flag to the clock tree. There are likely a number of
drivers missing this since it is not intuitive.
In the meantime, we have introduced the CLK_PARENT_MIXED flag which
handles this more robustly. All of the affected drivers (the ones
without CLK_BYPASS_XTAL) have been updated to use CLK_PARENT_MIXED, so
the CLK_BYPASS_XTAL flag is no longer needed on other drivers.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-14-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
cc8738cadc
clk: mediatek: mt8518: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-13-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
585748a716
clk: mediatek: mt8516: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-12-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
e4ade301ca
clk: mediatek: mt8512: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-11-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
ec7f2425a1
clk: mediatek: mt8365: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com >
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-10-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
3c46c551fa
clk: mediatek: mt8195: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com >
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-9-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
d632daabdc
clk: mediatek: mt8188: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com >
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-8-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
326d9c01f8
clk: mediatek: mt8183: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-7-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
a2d600dba3
clk: mediatek: mt7988: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-6-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
1ed05de4ab
clk: mediatek: mt7987: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-5-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
8fd90b148f
clk: mediatek: mt7981: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-4-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
5e145c0448
clk: mediatek: mt7629: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-3-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
b3455b3986
clk: mediatek: mt7623: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-2-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
David Lechner
c4173429db
clk: mediatek: mt7622: convert to struct mtk_parent
...
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com >
Reviewed-by: Julien Stephan <jstephan@baylibre.com >
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-1-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com >
2026-03-24 09:34:48 -05:00
Casey Connolly
1cf505e51b
watchdog: qcom: stop watchdog by default
...
Prevent the Qualcomm watchdog from autostarting and ensure it's stopped
when the driver probed. In some cases the watchdog is left running by
a previous bootloader stage. Disable autostart so it isn't left running
when we boot into the OS, this behaviour can be changed by enabling
autostart in the board defconfig.
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org >
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com >
Reviewed-by: Tom Rini <trini@konsulko.com >
Link: https://patch.msgid.link/20260121003659.69305-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:51:52 +01:00
Casey Connolly
4577a672ec
qcom: rpmh: don't error for SLEEP requests
...
Just stub out non-active votes, if we return an error the caller may
propagate it and not send its active vote. Since we don't suspend
there's no risk of us entering a broken state due to missing votes.
Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-2-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:49:17 +01:00
Casey Connolly
7f09aff399
serial: msm-geni: allow invalid clock
...
Pre-relocation we may not have a clock but it's usually been enabled for
us already, or worst case we will enable it after relocation. Erroring
out in this case will almost always cause U-Boot to hang pre-relocation
which is undesirable and may be hard to debug.
Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-1-b81d05832eec@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:49:17 +01:00
Tom Rini
bb5012fb66
power: regulator: qcom: Correct dependenecies for DM_REGULATOR_QCOM_USB_VBUS
...
The DM_REGULATOR_QCOM_USB_VBUS functionality can only work with DM_PMIC
enabled as well, so express this dependency in Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com >
Link: https://patch.msgid.link/20260323195302.2363577-1-trini@konsulko.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:42:19 +01:00
Balaji Selvanathan
0f265c20a5
phy: qcom: qusb2: Add QCS615 QUSB2 PHY support
...
Add support for QCS615 QUSB2 PHY by introducing platform-specific
initialization table and register layout. The implementation reuses
the IPQ6018 register layout and defines QCS615-specific tuning
parameters for proper USB PHY operation.
Taken from Linux commit 8adbf20e0502 ("phy: qcom-qusb2: Add support for QCS615")
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com >
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com >
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org >
Link: https://patch.msgid.link/20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:35:06 +01:00
Balaji Selvanathan
c4169dfa1d
clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support
...
Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615
clock driver. This clock is required for proper PHY operation
and eliminates clock-related warnings during USB initialization.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com >
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com >
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org >
Link: https://patch.msgid.link/20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:34:58 +01:00
Balaji Selvanathan
c4f40d0925
clk: qcom: qcs615: Add GCC_USB3_PRIM_CLKREF_CLK support
...
Add support for GCC_USB3_PRIM_CLKREF_CLK to the QCS615 clock driver.
This clock is referenced in the device tree USB node but was not
implemented in U-Boot, causing "Clock 152 not found" warnings during
fastboot run.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com >
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com >
Link: https://patch.msgid.link/20260213-talos_usb-v1-1-4c4355d61437@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org >
2026-03-24 11:34:58 +01:00
Tom Rini
eb95914b9f
Prepare v2026.04-rc5
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Signed-off-by: Tom Rini <trini@konsulko.com >
v2026.04-rc5
2026-03-23 14:19:17 -06:00
Tom Rini
1ffc541eaf
Merge patch series "DDR configuration refactor and 16GB dual-rank support"
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Emanuele Ghidoli <ghidoliemanuele@gmail.com > says:
From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com >
This series refactors the DDR configuration handling for the
Toradex Aquila AM69 board and adds support for a 16GB dual-rank
memory configuration, while changing the HW_CFG pins value to
DDR configurations mapping.
Link: https://lore.kernel.org/r/20260309155342.145432-1-ghidoliemanuele@gmail.com
2026-03-23 09:19:00 -06:00
Emanuele Ghidoli
39e014f43a
board: toradex: aquila-am69: Add support for 16GB dual rank memory configuration
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Move the existing 16GB single-rank configuration to HW_CFG 0x03 and use
the previous HW_CFG 0x01 value for the new 16GB dual-rank configuration.
There is no hardware using the former 16GB single-rank configuration,
so reuse the HW_CFG value for the new 16GB dual-rank configuration,
which will be used in production.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com >
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com >
2026-03-23 09:18:56 -06:00
Emanuele Ghidoli
f1fa422148
board: toradex: aquila-am69: refactor memory configuration
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The memory controller configuration doesn't depend only on the memory
size, so refactor the code to use the memory configuration read from
the HW_CFG pin instead of the memory size.
Additionally, make use of one header file for all the memory
configurations.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com >
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com >
2026-03-23 09:18:56 -06:00
Tom Rini
e1197b0cc2
Merge patch series "Provide a class for building filesystem images"
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Simon Glass <sjg@chromium.org > says:
Create a class around mk_fs() to handle the common tasks of image
creation, such as managing scratch directories and cleaning up.
Start with a few small cleanups to mk_fs(), then convert the helper
to use a class.
Link: https://lore.kernel.org/r/20260309151307.831537-1-sjg@chromium.org
2026-03-23 09:18:38 -06:00
Simon Glass
3691b1e4ce
test: Convert fs_helper to use a class
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Create a class around mk_fs() (and later setup_image()) to handle the
common tasks of image creation. Many callers of fs_helper.mk_fs()
create their own scratch directories while users of
fs_helper.setup_image() rely on one being returned. Unify this by
adding 'srcdir' as a field while converting to a class.
The class delegates to the existing mk_fs() function for the actual
filesystem creation, adding lifecycle management for scratch
directories and the image file.
Signed-off-by: Simon Glass <simon.glass@canonical.com >
Reviewed-by: Tom Rini <trini@konsulko.com >
2026-03-23 09:18:30 -06:00
Simon Glass
d030dc34d6
test: fs_helper: Drop the size_gran argument
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Nothing uses this argument, so make it a constant for now.
Signed-off-by: Simon Glass <simon.glass@canonical.com >
Reviewed-by: Christian Taedcke <christian.taedcke@weidmueller.com >
2026-03-23 09:18:30 -06:00
Simon Glass
ffaa324c89
test: Update comment for fs_helper.setup_image()
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This function actually allows creating two partitions now, so update its
comment to match that.
Signed-off-by: Simon Glass <simon.glass@canonical.com >
Reviewed-by: Tom Rini <trini@konsulko.com >
2026-03-23 09:18:30 -06:00
Simon Glass
23e9906192
test: fs_helper: Add a quiet flag to mk_fs()
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In many cases callers only want to see warnings and errors from the
filesystem-creation tools, not their normal output.
Add a quiet parameter to mk_fs() that suppresses the output of mkfs
and switches mcopy from verbose to quiet mode.
Signed-off-by: Simon Glass <simon.glass@canonical.com >
Reviewed-by: Tom Rini <trini@konsulko.com >
2026-03-23 09:18:29 -06:00