Commit Graph

26806 Commits

Author SHA1 Message Date
Andrew Goodbody
110a23e479 imx93: adc: local variable ret should not be unsigned
Local variable ret is declared as unsigned but is used to receive the
return value of functions that return int. ret is then tested for being
negative which must always fail. Change ret to be an int.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-24 08:00:08 -03:00
Frieder Schrempf
4a9d6b2e1d imx: power-domain: Fix crash due to uninitialized 'id' field
In case of the i.MX8M power-domains (i.MX8MQ, MM, MN) there is only
one power-domain for each device. Therefore the 'id' field in struct
power_domain should always be zero.

Currently if a power-domain is accessed after the initial bind, the
'id' field is left uninitialized. This didn't cause any problems
until the following commits were introduced:

9086b64ca0 ("power-domain: Add support for refcounting (again)")
a785ef2448 ("imx: power-domain: Enable refcounting on imx8mp")

Now the 'id' field gets accessed in the power_domain_off() sequence
and the invalid value causes "Synchronous Abort" failures.

This was observed on a i.MX8MM board when running "usb start" and
then "usb stop".

Fix this issue by setting power_domain->id to '0' in
imx8m_power_domain_of_xlate().

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Fixes: d08a194871 ("imx: add support for i.MX8MQ power domain controller")
Fixes: 9086b64ca0 ("power-domain: Add support for refcounting (again)")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-07-24 07:59:22 -03:00
Greg Malysa
3532f1f5ed block: Remove blk_find_first/next
In [0], Andrew noted a code quality issue in the implementation of
blk_find_first and blk_find_next. This led to the observation that the
logic of these functions was also likely incorrect, and based on a quick
check it seemed the functions were unused outside of test code, which
did not exercise the potential failure case, so we felt they should be
removed. In [1], a test patch which illustrates the failure in sandbox
is provided for reference.

Because a more thorough check agrees that these functions are unused,
they are currently incorrect, and fixed/removable flags on block devices
prior to probe are unreliable, just remove these functions instead of
fixing them. All potential users should have used blk_first_device_err
instead anyway.

CI results at [2].

[0] https://patchwork.ozlabs.org/project/uboot/patch/20250714-blk-uclass-v1-1-d21428c5f762@linaro.org/
[1] https://gist.github.com/gmalysa/b05e73a5c14bc18c5741a0e0e06a2992
[2] https://gitlab.com/gmalysa/lnxdsp-u-boot/-/pipelines/1931210857

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Reviewed-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-23 17:37:14 -06:00
Michal Simek
cf13f33d3a sysreset: psci: Fix SPL dependency
SYSRESET_PSCI should select SPL_ARM_PSCI_FW only when SPL_SYSRESET is
enabled/required. This change saves 1.6kB on Xilinx ZynqMP Kria platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-07-23 17:37:11 -06:00
Andrew Goodbody
23d2c182d4 fastboot: Fix off by 1 error
strlen only reports length of string not including terminating 0 byte
but this has to be included in length of receiving buffer on copy so
adjust length check to be correct.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-07-22 11:30:14 -06:00
Ariel D'Alessandro
afca60620a drivers: fastboot: Add support for SPI flash memory
Fastboot currently supports MMC and NAND flash devices. Similarly,
extend the support to SPI flash memories.

Note that in this initial implementation, partitions on the device are
not supported yet, but raw partitions can be set in U-Boot environment.

To define a raw partition descriptor, add an environment variable
similar to the MMC case:

```
fastboot_raw_partition_<raw partition name>=<offset> <size>
```

for example:

```
fastboot_raw_partition_boot=0x0 0x1000000
```

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-07-22 11:30:14 -06:00
Tom Rini
7c85ee1f49 Merge tag 'i2c-for-2025.10-take2' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2025.10

- i2c Kconfig updates from Tom
  - add some driver dependencies
  - added missing include delay.h in iproc_i2c.c

- i2c: muxes: Add PCA9541 i2c arbitrator driver
  from Padmarao Begari

- pca954x: add pca9545 support
  from Frank Wunderlich

- cmd: i2c: fix build when CFG_SYS_I2C_NOPROBES defined with DM_I2C
  From Holger Brunck
2025-07-19 08:38:11 -06:00
Tom Rini
bf9a78f109 misc: Remove DS4510 driver
As no platforms use this driver anymore and it's not been converted from
to DM_I2C for use, remove it.

Fixes: ed7fe2bee1 ("ppc: Remove xpedite boards")
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:17 -06:00
Tom Rini
bdf443ffd5 drivers: misc: Remove pca9551_led driver
This driver has not been converted to DM_I2C and the last platform that
used it was removed as well. Remove the driver.

Fixes: 4bbcec08eb ("arm: Remove mx6dlarm2 board")
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:13 -06:00
Tom Rini
a05c01c8e6 input: Tighten dependency requirements for TEGRA_KEYBOARD
This driver requires headers which only exist on Tegra. Express that
requirement in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:09 -06:00
Tom Rini
14d20133a8 misc: Tighten requirements on IHS_FPGA driver
This driver requires that the gdsys legacy driver option also be enabled
in order to build. Express that requirement in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:05 -06:00
Tom Rini
0f83825802 Merge tag 'u-boot-imx-master-20250717' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27088

- Add support for the i.MX95 B0 version.
- Enable standard boot for phycore-imx8mp.
- Kconfig fixes for i.MX MMC and FSL_SEC_MON.
- Support 4Gb single die variant of the i.MX8MM Venice board.
2025-07-17 11:42:46 -06:00
Tom Rini
31b5df2e8b Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/27087

- Board: mpfs_icicle: Fix board_fit_config_name_match and disable
  DEBUG_UART
- Board: Add SD card support to the Beagle-V-Fire
- Board: Add support for TH1520-integrated GMACs
2025-07-17 11:39:50 -06:00
Tom Rini
fee5f4b619 mmc: Remove unused kona_sdhci driver
As no platforms use this driver anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-07-17 11:39:07 -06:00
Tom Rini
f57b4a94c5 mmc: Tighten some mmc driver dependencies
A large number of mmc drivers cannot build without access to some
platform specific header files. Express those requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-07-17 11:39:07 -06:00
Andrew Goodbody
1d2723731b mmc: Take cleanup path to free memory on error exit
Instead of returning -EINVAL directly which will not call the cleanup
path to free memory, fix the code to set the error and then goto the
cleanup code.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-07-17 11:39:06 -06:00
Tom Rini
d4a9ce26cb nxp: Move FSL_SEC_MON related options to arch/Kconfig.nxp
The options related to FSL_SEC_MON are part of the chain of trust
related options and should be under that menu, so move it there.
Furthermore we don't need to prompt for the driver itself but do need to
allow for configuration of the monitor endianess.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-17 09:57:39 -03:00
Tom Rini
7e42f3671d arm: imx: Remove unused mxcmmc driver
As no platforms use this driver anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-17 09:57:23 -03:00
Yao Zi
8a3c3a8a11 drivers: net: Add T-Head DWMAC glue layer
The Designware IP integrated in TH1520 SoC requires extra clock
configuration to operate correctly. The Linux kernel's T-Head DWMAC glue
driver is ported and adapted to U-Boot's API.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-07-17 14:37:40 +08:00
Yao Zi
00a3b0eb8e clk: thead: th1520-ap: Correctly handle flags for dividers
Unlike the gate clocks which make no use of flags, most dividers in
TH1520 SoC are one-based, thus are applied with CLK_DIVIDER_ONE_BASED
flag. We couldn't simply ignore the flag, which causes wrong results
when calculating the clock rates.

Add a member to ccu_div_internal for defining the flags, and pass it to
divider_recalc_rate(). With this fix, frequency of all the clocks match
the Linux kernel's calculation.

Fixes: e6bfa6fc94 ("clk: thead: Port clock controller driver of TH1520 SoC")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-07-17 14:37:40 +08:00
Eoin Dickson
cde3d1ff30 spi: coreqspi: add xfer function for PolarFire SoC
Add xfer function to PolarFire SoC coreqspi driver. The read and write
operations are limited to one byte at a time instead of four as CMD18
(multiple block read) reads garbage when four byte ops are enabled.

Signed-off-by: Eoin Dickson <eoin.dickson@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-07-17 14:37:36 +08:00
Eoin Dickson
63e8a80cb3 gpio: add PolarFire SoC GPIO and Core GPIO driver
This driver adds GPIO support for PolarFire SoC family, this is required
to add sd card support on the Beagle-V-Fire as it uses GPIO chip selects

Signed-off-by: Eoin Dickson <eoin.dickson@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-07-17 14:37:36 +08:00
Sam Protsenko
89911825a2 dfu: Fix dfu_config_interfaces() for single interface DFU syntax
As stated in DFU documentation [1], the device interface part might be
missing in dfu_alt_info:

    dfu_alt_info
        The DFU setting for the USB download gadget with a semicolon
        separated string of information on each alternate:
            dfu_alt_info="<alt1>;<alt2>;....;<altN>"
        When several devices are used, the format is:
            - <interface> <dev>'='alternate list (';' separated)

So in first case dfu_alt_info might look like something like this:

    dfu_alt_info="mmc 0=rawemmc raw 0 0x747c000 mmcpart 1;"

And in second case (when the interface is missing):

    dfu_alt_info="rawemmc raw 0 0x747c000 mmcpart 1;"

When the interface is not specified the 'dfu' command crashes when
called using 'dfu 0' or 'dfu list' syntax:

    => dfu list
    "Synchronous Abort" handler, esr 0x96000006, far 0x0

That's happening due to incorrect string handling in
dfu_config_interfaces(). In case when the interface is not specified in
dfu_alt_info it triggers this corner case:

    d = strsep(&s, "=");  // now d contains s, and s is NULL
    if (!d)
        break;
    a = strsep(&s, "&");  // s is already NULL, so a is NULL too
    if (!a)               // corner case
        a = s;            // a is NULL now

which causes NULL pointer dereference later in this call, due to 'a'
being NULL:

    part = skip_spaces(part);

That's because as per strsep() behavior, when delimiter ("&") is not
found, the token (a) becomes the entire string (s), and string (s)
becomes NULL. To fix that issue assign "a = d" instead of "a = s",
because at that point variable d actually contains previous s, which
should be used in this case.

[1] doc/usage/dfu.rst

Fixes: commit febabe3ed4 ("dfu: allow to manage DFU on several devices")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250709042342.13544-1-semen.protsenko@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-07-16 10:56:28 -06:00
Tom Rini
fb98816439 i2c: Kconfig: Tighten some i2c driver dependencies
A few i2c drivers cannot build without access to some platform specific
header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-16 09:20:13 +02:00
Tom Rini
7def358efc i2c: Add missing <linux/delay.h> to iproc_i2c.c
This driver makes delay function calls while relying on an indirection
inclusion of <linux/delay.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-16 09:20:13 +02:00
Tom Rini
2af7f4a456 Merge patch series "drivers/net/airoha_eth: fixes"
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> says:

Several fixes for the airoha ethernet driver.

Link: https://lore.kernel.org/r/20250709092810.4032971-1-mikhail.kshevetskiy@iopsys.eu
2025-07-15 09:56:08 -06:00
Mikhail Kshevetskiy
0e59a2ca9d drivers/net/airoha_eth: enable hw padding of short tx packets
Transmission of short packets does not work good for XFI (GDM2) and
HSGMII (GDM3) interfaces. The issue can be solved with:

 - padding of short packets to 60 bytes
 - setting of PAD_EN bit in the corresponding REG_GDM_FWD_CFG(n)
   register.

The issue should present for the lan switch (GDM1) as well, but it does
does not appear due to unknown reason.

This patch set PAD_EN bit for the used GDM.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2025-07-15 09:56:01 -06:00
Mikhail Kshevetskiy
997786bbf4 drivers/net/airoha_eth: fix stalling in package receiving
ARCH_DMA_MINALIGN is 64 for ARMv7a/ARMv8a architectures, but RX/TX
descriptors are 32 bytes long. So they may not be aligned on an
ARCH_DMA_MINALIGN boundary. In case of RX path, this may cause the
following problem

1) Assume that a packet has arrived and the EVEN rx descriptor has been
   updated with the incoming data. The driver will invalidate and check
   the corresponding rx descriptor.

2) Now suppose the next descriptor (ODD) has not yet completed.

   Please note that all even descriptors starts on 64-byte boundary,
   and the odd ones are NOT aligned on 64-byte boundary.

   Inspecting even descriptor, we will read the entire CPU cache line
   (64 bytes). So we read and sore in CPU cache also the next (odd)
   descriptor.

3) Now suppose the next packet (for the odd rx descriptor) arrived
   while the first packet was being processed. So we have new data
   in memory but old data in cache.

4) After packet processing (in arht_eth_free_pkt() function) we will
   cleanup the descriptor and put it back to rx queue.

   This will call flush_dcache_range() function for the even descriptor,
   so the odd one will be flushed as well (it is in the same cache line).
   So the old data will be written to the next rx descriptor.

5) We get a freeze. The next descriptor is empty (so the driver is
   waiting for packets), but the hardware will continue to receive
   packets on other available descriptors. This will continue until
   the last available rx descriptor is full. Then the hardware will
   also freeze.

The problem will be solved if the previous descriptor will be put back
to the queue instead of the current one.

If the current descriptor is even (starts on a 64-byte boundary),
then putting the previous descriptor to the rx queue will affect
the previous cache line. To be 100% ok, we must make sure that the
previous and the one before the previous descriptor cannot be used
for receiving at this moment.

If the current descriptor is odd, then the previous descriptor is on
the same cache line. Both (current and previous) descriptors are not
currently in use, so issue will not arrise.

WARNING: The following restrictions on PKTBUFSRX must be held:
  * PKTBUFSRX is even,
  * PKTBUFSRX >= 4.

The bug appears on 32-bit airoha platform, but should be present on
64-bit as well.

The code was tested both on 32-bit and 64-bit airoha boards.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2025-07-15 09:56:01 -06:00
Mikhail Kshevetskiy
5d49fa9e56 drivers/net/airoha_eth: fix packet transmission errors
The dma_map_single() function calls one of the functions
  * invalidate_dcache_range(),
  * flush_dcache_range().
Both of them expect that 'vaddr' is aligned to the ARCH_DMA_MINALIGN
boundary. Unfortunately, RX/TX descriptors are 32-byte long. Thus they
might not be aligned to the ARCH_DMA_MINALIGN boundary. Data flushing
(or invalidating) might do nothing in this case.

The same applies to dma_unmap_single() function.

In the TX path case the issue might prevent package transmission (filled
TX descriptor was not flushed).

To fix an issue a special wrappers for
  * dma_map_single(),
  * dma_unmap_single()
functions were created. The patch fix flushing/invalidatiog for the
RX path as well.

The bug appears on 32-bit airoha platform, but should be present on
64-bit as well.

The code was tested both on 32-bit and 64-bit airoha boards.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2025-07-15 09:56:01 -06:00
Mikhail Kshevetskiy
189d0b4477 drivers/net/airoha_eth: add missing terminator for compatible devices list
Compatible device list must have a terminator. If terminator is missed
the u-boot driver subsystem will access random data placed after the
list in the memory.

The issue can be observed with the "dm compat" command.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2025-07-15 09:56:01 -06:00
Weijie Gao
70db2be9fb net: mediatek: correct the AN8855 TPID value in port isolation settings
The TPID value should be 0x9100 instead of 0x8100 according to the
datasheet.

Fixes: cedafee9ff (net: mediatek: add support for Airoha AN8855 ethernet switch)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-07-15 09:55:34 -06:00
Andrew Goodbody
cd79a2839b ofnode: NULL check bootscr_flash_size before dereference
Move the NULL check of bootscr_flash_size to before the first time it is
dereferenced to avoid any possible segment violations.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-07-14 15:16:56 -06:00
Andrew Goodbody
22039ef94a pci: Assign a default value on reads on error
Many callers of PCI read functions do not check the return value for
error before using the variable that should contain the value read were
there not to be an error. However in the error case this variable is
never assigned to and so will contain uninitialised data.
To provide some certainty as to behaviour in the error case assign a
default value of all bits set.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-14 15:16:48 -06:00
Andrew Goodbody
41713b9967 scsi: Make static functions consistent using lbaint_t
The static helper functions are inconsistent in their use of their third
parameter which is used to pass a block count. Keep consistency by
always using lbaint_t here. This will fix an issue where two left shifts
were overflowing the variable type in use.

This issue found by Smatch

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-07-14 15:16:43 -06:00
Andrew Goodbody
bae3a34cb9 cros_ec: sandbox: Use correct value for number of slots
In the definition of struct ec_state the number of slots that are
created is VSTORE_SLOT_COUNT (==4) but the value of req->slot is
checked against EC_VSTORE_SLOT_MAX (==32) so this can lead to memory
access beyond that allocated.
Instead change the size check to use VSTORE_SLOT_COUNT to ensure it
matches what has actually been allocated.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-07-14 15:16:30 -06:00
Philip Molloy
b4c65b337a gpio: add SPL to Kconfig option description
DM_GPIO_LOOKUP_LABEL and SPL_DM_GPIO_LOOKUP_LABEL had the same
description and therefore appeared to be duplicates in Kconfig frontends

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
2025-07-14 12:44:04 -06:00
Philip Molloy
b476530a84 pinctrl-uclass: update comment to reflect code
The logic was updated without modifying the comment above it

Fixes: 72b8c6d1eb ("pinctrl: don't fall back to pinctrl_select_state_simple()")

Signed-off-by: Philip Molloy <philip.molloy@analog.com>
2025-07-14 12:44:04 -06:00
Tom Rini
235e14b0f1 Merge tag 'qcom-main-20250714' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/27056

- Fix unused access in ufetch
- Add missing clock for SM8650
- Port the Linux SPMI GPIO driver and port over SM8550 (other platforms
  should follow)
2025-07-14 08:54:19 -06:00
Rui Miguel Silva
07ddbb89c9 clk: qcom: sm8650: add usb3 noc clk
Commit [0] introduced, correctly, the bubble of qcom clock errors to
make it easy to spot missing clocks in the platforms, and this is a case
of that, add the GCC_CFG_NOC_USB3_PRIM_AXI_CLK clock to sm8650 clock
pool.

0: 7c5460afec ("clk/qcom: bubble up qcom_gate_clk_en() errors")

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250618093253.225929-1-rui.silva@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-07-14 15:35:24 +02:00
Balaji Selvanathan
9cd3118e4a watchdog: qcom-wdt: Drop read check on write-only WDT_EN register
On some Qualcomm platforms, such as Dragonwing boards, the WDT_EN
register is write-only. Reading it back after enabling the watchdog
can return invalid data or cause unexpected behavior.

In particular, the check:
  if (readl(wdt_addr(wdt, WDT_EN)) != 1)
may fail even though the watchdog is correctly enabled and running.
This leads to misleading error messages and unnecessary failures.

Removing the read check ensures compatibility and avoids false
negatives on platforms where WDT_EN is not readable.

This work builds upon this previous submission:
https://lore.kernel.org/u-boot/20250625094607.1348494-1-gopinath.sekar@oss.qualcomm.com/

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/20250701065738.1644669-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-07-14 15:35:24 +02:00
Neil Armstrong
d8da51a87c gpio: qcom: move pm8550 gpio to new driver
Move support of the pm8550 gpios to the newly introduced
driver and drop the compatible entry and the read-only quirk
at the same time from the old driver.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-topic-sm8x50-pmic-gpio-pinctrl-new-v2-2-cc1512931197@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-07-14 15:35:24 +02:00
Neil Armstrong
d0ceeb944a gpio: qcom: add new driver for SPMI gpios
The current qcom_pmic_gpio driver is too limited and doesn't
support state tracking for all pins like the Linux driver.

Adding full pinconf support would require adding the state
and it's much simpler to restart from scratch with a new
driver based on the Linux one adapted to the U-Boot GPIO
and Pinctrl APIs.

For now only the PMICs I've been able to validate are
added in the compatible list but we should be able to
add the entire list from the Linux driver.

There's a few difference from the Linux driver:
- no IRQ support
- uses the U-Boot GPIO flags that maps very well
- uses the gpio-ranges to get the pins count
- no debugfs but prints the pin state via pinmux callback

It uses the same CONFIG entry as the old one, since
the ultimate goal is to migrate entirely on this new
driver once we verify it doesn't break the older
platforms.

Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630-topic-sm8x50-pmic-gpio-pinctrl-new-v2-1-cc1512931197@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-07-14 15:35:24 +02:00
Padmarao Begari
55d6d715a4 i2c: muxes: Add PCA9541 i2c arbitrator driver
Add a driver for the PCA9541 i2c bus arbitrator based
on the Linux driver for the same device.

Co-developed-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Jonathan Stroud <jonathan.stroud@amd.com>
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
2025-07-12 07:36:51 +02:00
Frank Wunderlich
4d104f0f5e i2c: muxes: pca954x: add pca9545 support
Add support for 4 channel pca9545 found on Bananapi R4.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Michal Simek <michal.simek@amd.com>
2025-07-12 07:36:30 +02:00
Tom Rini
53bd87651e block: sandbox: Add support for SYS_64BIT_LBA
In order to use SYS_64BIT_LBA with this driver we need for "start" to
also be of type lbaint_t and to then use the correct printf format
characters.

Reviewed-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-11 11:33:25 -06:00
Tom Rini
7adb9b03a6 Kconfig: Test for !COMPILE_TEST in some locations
We have a few options that we cannot enable in a "allyesconfig" type
build because we cannot use zero as a default value.

- The logic around HAS_BOARD_SIZE_LIMIT assumes that if we have set this
  then we compare with it. Similarly, we need to set SPL_NO_BSS_LIMIT as
  the default there.
- Both SYS_CUSTOM_LDSCRIPT and ENV_USE_DEFAULT_ENV_TEXT_FILE then prompt
  for a file name to use.
- The SYS_I2C_SOFT driver is a legacy driver which requires a lot of
  configuration within the board config. file instead, so disable it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-11 11:33:25 -06:00
Tom Rini
b4528976e7 Merge patch series "Create uclass for HW AES cryptographic devices"
Svyatoslav Ryhel <clamor95@gmail.com> says:

Add uclass for HW AES cryptographic devices found on some devices, like
Tegra20/Tegra30 SoC AES engine.

Link: https://lore.kernel.org/r/20250629105711.24687-1-clamor95@gmail.com
2025-07-11 11:33:25 -06:00
Ion Agorria
a2e86dafd7 crypto: aes: Add software AES DM driver
This adds AES crypto engine using the AES Uclass implemented in software,
serves as example implementation and for uclass tests.

Those implementing HW AES crypto engine drivers can use this as basis and
replace software parts with the HW specifics of their device.

Signed-off-by: Ion Agorria <ion@agorria.com>
2025-07-11 10:43:29 -06:00
Ion Agorria
0d84494064 dm: crypto: Create AES uclass
Create a basic framework for a group of devices that perform AES
cryptographic operations.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-07-11 10:43:29 -06:00
Tom Rini
561134e04d Merge tag 'u-boot-imx-master-20250710' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27010

- Fix the i.MX8M Nano GPU path.
- Enable RNG support for KASLR on Toradex i.MX8 boards.
- Enable watchdog and clock driver for imx6ulz_smm_m2b.
- Tighten dependencies on CMD_BLOB.
- Remove the rest of i.MX31 support.
2025-07-11 08:38:53 -06:00