Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.
Fixes: 9b0b5648d6 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.
This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Due to the use of the Tegra DC backlight feature by the HTC ONE X,
backlight requests MUST NOT be made during probe or earlier. This is
because it creates a loop, as the backlight is a DC child.
To mitigate this issue, backlight requests can be made later, once the
backlight is actively used.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
