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4 Commits

Author SHA1 Message Date
wdenk
4a6fd34b26 * Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board

* Add new meaning to "autostart" environment variable:
  If set to "no", a standalone image passed to the
  "bootm" command will be copied to the load address
  (and eventually uncompressed), but NOT be started.
  This can be used to load and uncompress arbitrary
  data.

* Set max brightness for MN11236 displays on TRAB board
2003-04-12 23:38:12 +00:00
stroese
69f8f827d5 Patch from Stefan Roese. 2003-04-10 13:30:28 +00:00
stroese
759a51b4f3 Changed DHCP client to use ip address from server option field #54 from the OFFER-paket in the server option field #54 in the REQUEST-paket. This fixes a problem using a Windows 2000 DHCP server, where the DHCP-server is not the TFTP-server. 2003-04-10 13:26:44 +00:00
wdenk
d126bfbdbd Add support for TQM862L modules 2003-04-10 11:18:18 +00:00
20 changed files with 936 additions and 391 deletions

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@@ -1,3 +1,27 @@
======================================================================
Changes since U-Boot 0.3.0:
======================================================================
* Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board
* Add new meaning to "autostart" environment variable:
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
* Patch by Stefan Roese, 10 Apr 2003:
Changed DHCP client to use IP address from server option field #54
from the OFFER packet in the server option field #54 in the REQUEST
packet. This fixes a problem using a Windows 2000 DHCP server,
where the DHCP-server is not the TFTP-server.
* Set max brightness for MN11236 displays on TRAB board
* Add support for TQM862L modules
======================================================================
Changes for U-Boot 0.3.0:
======================================================================

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@@ -353,15 +353,12 @@ TQM850L_80MHz_config \
TQM855L_config \
TQM855L_66MHz_config \
TQM855L_80MHz_config \
TQM855L_FEC_config \
TQM855L_FEC_66MHz_config \
TQM855L_FEC_80MHz_config \
TQM860L_config \
TQM860L_66MHz_config \
TQM860L_80MHz_config \
TQM860L_FEC_config \
TQM860L_FEC_66MHz_config \
TQM860L_FEC_80MHz_config: unconfig
TQM862L_config \
TQM862L_66MHz_config \
TQM862L_80MHz_config: unconfig
@ >include/config.h
@[ -z "$(findstring _FEC,$@)" ] || \
{ echo "#define CONFIG_FEC_ENET" >>include/config.h ; \
@@ -746,7 +743,7 @@ clobber: clean
| xargs rm -f
rm -f $(OBJS) *.bak tags TAGS
rm -fr *.*~
rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
rm -f include/asm/arch include/asm

6
README
View File

@@ -1918,6 +1918,12 @@ Some configuration options can be set using Environment Variables:
be automatically started (by internally calling
"bootm")
If set to "no", a standalone image passed to the
"bootm" command will be copied to the load address
(and eventually uncompressed), but NOT be started.
This can be used to load and uncompress arbitrary
data.
initrd_high - restrict positioning of initrd images:
If this variable is not set, initrd images will be
copied to the highest possible address in RAM; this

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@@ -126,12 +126,12 @@ long int initdram (int board_type)
memctl->memc_mar = 0x00000088;
/*
* Map controller bank 1 to the SDRAM bank at
* Map controller bank 2 to the SDRAM bank at
* preliminary address - these have to be modified after the
* SDRAM size has been determined.
*/
memctl->memc_or1 = CFG_OR1_PRELIM;
memctl->memc_br1 = CFG_BR1_PRELIM;
memctl->memc_or2 = CFG_OR2_PRELIM;
memctl->memc_br2 = CFG_BR2_PRELIM;
memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
@@ -139,9 +139,9 @@ long int initdram (int board_type)
/* perform SDRAM initializsation sequence */
memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
memctl->memc_mcr = 0x80004105; /* SDRAM bank 0 */
udelay (200);
memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
memctl->memc_mcr = 0x80004230; /* SDRAM bank 0 - execute twice */
udelay (200);
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
@@ -153,7 +153,7 @@ long int initdram (int board_type)
*
* try 8 column mode
*/
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
udelay (1000);
@@ -161,13 +161,13 @@ long int initdram (int board_type)
/*
* try 9 column mode
*/
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
size_b0 = size9;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
} else { /* back to 8 columns */
size_b0 = size8;
memctl->memc_mamr = CFG_MAMR_8COL;
udelay (500);
@@ -200,6 +200,47 @@ long int initdram (int board_type)
udelay (10000);
#ifdef CONFIG_CAN_DRIVER
/* Initialize OR3 / BR3 */
memctl->memc_or3 = CFG_OR3_CAN; /* switch GPLB_5 to GPLA_5 */
memctl->memc_br3 = CFG_BR3_CAN;
/* Initialize MBMR */
memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 works as UPWAITB */
/* Initialize UPMB for CAN: single read */
memctl->memc_mdr = 0xFFFFC004;
memctl->memc_mcr = 0x0100 | UPMB;
memctl->memc_mdr = 0x0FFFD004;
memctl->memc_mcr = 0x0101 | UPMB;
memctl->memc_mdr = 0x0FFFC000;
memctl->memc_mcr = 0x0102 | UPMB;
memctl->memc_mdr = 0x3FFFC004;
memctl->memc_mcr = 0x0103 | UPMB;
memctl->memc_mdr = 0xFFFFDC05;
memctl->memc_mcr = 0x0104 | UPMB;
/* Initialize UPMB for CAN: single write */
memctl->memc_mdr = 0xFFFCC004;
memctl->memc_mcr = 0x0118 | UPMB;
memctl->memc_mdr = 0xCFFCD004;
memctl->memc_mcr = 0x0119 | UPMB;
memctl->memc_mdr = 0x0FFCC000;
memctl->memc_mcr = 0x011A | UPMB;
memctl->memc_mdr = 0x7FFCC004;
memctl->memc_mcr = 0x011B | UPMB;
memctl->memc_mdr = 0xFFFDCC05;
memctl->memc_mcr = 0x011C | UPMB;
#endif
return (size_b0);
}
@@ -213,8 +254,8 @@ long int initdram (int board_type)
* - short between data lines
*/
static long int dram_size (long int mamr_value, long int *base,
long int maxsize)
static long int dram_size (long int mamr_value,
long int *base, long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
@@ -257,10 +298,10 @@ static long int dram_size (long int mamr_value, long int *base,
/* ------------------------------------------------------------------------- */
void r360_pwm_write (uchar reg, uchar val)
void r360_i2c_lcd_write (uchar data0, uchar data1)
{
if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
printf ("Can't write PWM register 0x%02X.\n", reg);
if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
}
}
@@ -271,10 +312,8 @@ void r360_pwm_write (uchar reg, uchar val)
*/
/* Number of bytes returned from Keyboard Controller */
#define KEYBD_KEY_MAX 20 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
static uchar kbd_addr = CFG_I2C_KBD_ADDR;
#define KEYBD_KEY_MAX 16 /* maximum key number */
#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
static uchar *key_match (uchar *);
@@ -287,14 +326,14 @@ int misc_init_r (void)
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
for (i = 0; i < KEYBD_DATALEN; ++i) {
sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
}
setenv ("keybd", keybd_env);
str = strdup (key_match (kbd_data)); /* decode keys */
str = strdup (key_match (keybd_env)); /* decode keys */
#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
setenv ("preboot", str); /* set or delete definition */
@@ -324,16 +363,13 @@ int misc_init_r (void)
static uchar kbd_magic_prefix[] = "key_magic";
static uchar kbd_command_prefix[] = "key_cmd";
static uchar *key_match (uchar * kbd_data)
static uchar *key_match (uchar * kbd_str)
{
uchar compare[KEYBD_DATALEN];
uchar magic[sizeof (kbd_magic_prefix) + 1];
uchar cmd_name[sizeof (kbd_command_prefix) + 1];
uchar key_mask;
uchar *str, *nxt, *suffix;
uchar *str, *suffix;
uchar *kbd_magic_keys;
char *cmd;
int i;
/*
* The following string defines the characters that can pe appended
@@ -343,62 +379,48 @@ static uchar *key_match (uchar * kbd_data)
* "key_magic" is checked (old behaviour); the string "125" causes
* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
*/
if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
kbd_magic_keys = "";
if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix = kbd_magic_keys;
*suffix || suffix == kbd_magic_keys;
++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
/* loop over all magic keys;
* use '\0' suffix in case of empty string
*/
for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
#if 0
printf ("### Check magic \"%s\"\n", magic);
printf ("### Check magic \"%s\"\n", magic);
#endif
memcpy(compare, kbd_data, KEYBD_DATALEN);
if ((str = getenv (magic)) != 0) {
for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
uchar c;
#if 0
printf ("### Compare \"%s\" \"%s\"\n",
kbd_str, str);
#endif
if (strcmp (kbd_str, str) == 0) {
sprintf (cmd_name, "%s%c",
kbd_command_prefix,
*suffix);
c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
if (str == nxt) /* invalid character */
break;
if (c >= KEYBD_KEY_MAX) /* bad key number */
goto next_magic;
key_mask = 0x80 >> (c % 8);
if (!(compare[c / 8] & key_mask)) /* key not pressed */
goto next_magic;
compare[c / 8] &= ~key_mask;
if ((cmd = getenv (cmd_name)) != 0) {
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd);
#endif
return (cmd);
}
}
}
}
for (i=0; i<KEYBD_DATALEN; i++)
if (compare[i]) /* key(s) not released */
goto next_magic;
sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
cmd = getenv (cmd_name);
#if 0
printf ("### Set PREBOOT to $(%s): \"%s\"\n",
cmd_name, cmd ? cmd : "<<NULL>>");
#endif
*kbd_data = *suffix;
return (cmd);
next_magic:;
}
#if 0
printf ("### Delete PREBOOT\n");
#endif
*kbd_data = '\0';
*kbd_str = '\0';
return (NULL);
}
#endif /* CONFIG_PREBOOT */
#endif /* CONFIG_PREBOOT */
/* Read Keyboard status */
int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
@@ -410,7 +432,7 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
/* Read keys */
i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
puts ("Keys:");
for (i = 0; i < KEYBD_DATALEN; ++i) {

View File

@@ -486,7 +486,11 @@ int drv_vfd_init(void)
/* frame buffer endadr */
rLCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
rLCDSADDR3 = ((256/4));
rLCDCON2 = 0x000DC000;
rLCDCON2 = 0x000DC000;
if(gd->vfd_type == VFD_TYPE_MN11236)
rLCDCON2 = 37 << 14; /* MN11236: 38 lines */
else
rLCDCON2 = 55 << 14; /* T119C: 56 lines */
rLCDCON3 = 0x0051000A;
rLCDCON4 = 0x00000001;
if (gd->vfd_type && vfd_inv_data)

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@@ -56,7 +56,7 @@ void bedbug_init( void )
#if defined(CONFIG_4xx)
void bedbug405_init( void );
bedbug405_init();
#elif defined(CONFIG_MPC860)
#elif defined(CONFIG_8xx)
void bedbug860_init( void );
bedbug860_init();
#endif

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@@ -287,12 +287,17 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
switch (hdr->ih_type) {
case IH_TYPE_STANDALONE:
appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
if (iflag)
enable_interrupts();
/* load (and uncompress), but don't start if "autostart"
* is set to "no"
*/
if (((s = getenv("autostart")) != NULL) && (strcmp(s,"no") == 0))
return 0;
appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
(*appl)(cmdtp, flag, argc-1, &argv[1]);
break;
return 0;
case IH_TYPE_KERNEL:
case IH_TYPE_MULTI:
/* handled below */

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@@ -55,7 +55,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
unsigned short data;
int rcode = 0;
#ifdef CONFIG_MPC860
#ifdef CONFIG_8xx
mii_init ();
#endif

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@@ -11,7 +11,7 @@
#include <bedbug/regs.h>
#include <bedbug/ppc.h>
#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_MPC860)
#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_8xx)
#define MAX_BREAK_POINTS 2

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@@ -44,7 +44,7 @@ static char *cpu_warning = "\n " \
#if ((defined(CONFIG_MPC860) || defined(CONFIG_MPC855)) && \
!defined(CONFIG_MPC862))
# ifdef CONFIG_MPC855
# ifdef CONFIG_MPC855
# define ID_STR "PC855"
# else
# define ID_STR "PC860"

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@@ -177,6 +177,8 @@ static vidinfo_t panel_info = {
/*
* Sharp LQ057Q3DC02 display. Active, color, single scan.
*/
#define LCD_DF 12
static vidinfo_t panel_info = {
320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_LOW, CFG_LOW, CFG_HIGH,
3, 0, 0, 1, 1, 15, 4, 0, 3
@@ -260,11 +262,11 @@ static vidinfo_t panel_info = {
* Emerging Display Technologies 320x240. Passive, monochrome, single scan.
*/
#define LCD_BPP LCD_MONOCHROME
#define LCD_DF 20
#define LCD_DF 10
static vidinfo_t panel_info = {
320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_LOW,
LCD_BPP, 0, 0, 0, 0, 0, 15, 0, 0
LCD_BPP, 0, 0, 0, 0, 33, 0, 0, 0
};
#endif
/*----------------------------------------------------------------------*/
@@ -977,15 +979,18 @@ static void lcd_enable (void)
c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */
pic_write (0x60, c);
}
#elif defined(CONFIG_R360MPI)
{
extern void r360_pwm_write (uchar reg, uchar val);
r360_pwm_write(8, 1);
r360_pwm_write(0, 4);
r360_pwm_write(1, 6);
}
#endif /* CONFIG_LWMON */
#if defined(CONFIG_R360MPI)
{
extern void r360_i2c_lcd_write (uchar data0, uchar data1);
r360_i2c_lcd_write(0x10, 0x01);
r360_i2c_lcd_write(0x20, 0x01);
r360_i2c_lcd_write(0x3F, 0xFF);
r360_i2c_lcd_write(0x47, 0xFF);
}
#endif /* CONFIG_R360MPI */
}
/*----------------------------------------------------------------------*/
@@ -1003,10 +1008,12 @@ static void lcd_disable (void)
}
#elif defined(CONFIG_R360MPI)
{
extern void r360_pwm_write (uchar reg, uchar val);
extern void r360_i2c_lcd_write (uchar data0, uchar data1);
r360_pwm_write(0, 0);
r360_pwm_write(1, 0);
r360_i2c_lcd_write(0x10, 0x00);
r360_i2c_lcd_write(0x20, 0x00);
r360_i2c_lcd_write(0x30, 0x00);
r360_i2c_lcd_write(0x40, 0x00);
}
#endif /* CONFIG_LWMON */
/* Disable the LCD panel */

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@@ -75,7 +75,8 @@ typedef void (interrupt_handler_t)(void *);
/* enable common handling for all TQM8xxL boards */
#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) || \
defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L)
defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L) || \
defined(CONFIG_TQM862L)
# ifndef CONFIG_TQM8xxL
# define CONFIG_TQM8xxL
# endif

View File

@@ -1362,9 +1362,11 @@ typedef struct scc_enet {
#define SICR_ENET_CLKRT ((uint)0x00002600)
#endif /* CONFIG_MVS v1, CONFIG_TQM823L, CONFIG_TQM850L, etc. */
/*** TQM860L, TQM855L ************************************************/
/*** TQM855L, TQM860L, TQM862L **************************************/
#if (defined(CONFIG_TQM860L) || defined(CONFIG_TQM855L))
#if defined(CONFIG_TQM855L) || \
defined(CONFIG_TQM860L)
defined(CONFIG_TQM862L)
# ifdef CONFIG_SCC1_ENET /* use SCC for 10Mbps Ethernet */
@@ -1412,7 +1414,7 @@ typedef struct scc_enet {
#define PD_MII_MASK ((ushort)0x1FFF) /* PD 3...15 */
# endif /* CONFIG_FEC_ENET */
#endif /* CONFIG_TQM860L, CONFIG_TQM855L */
#endif /* CONFIG_TQM855L, TQM860L, TQM862L */
/*** V37 **********************************************************/

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@@ -47,7 +47,7 @@
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 9600 /* console baudrate = 9600bps */
#define CONFIG_BAUDRATE 115200 /* console baudrate in bps */
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
@@ -83,7 +83,7 @@
#endif /* CONFIG_LCD */
#endif
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
#define CONFIG_CAN_DRIVER /* CAN Driver support enabled */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
@@ -113,9 +113,9 @@
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(50)
#define CFG_I2C_PWM_ADDR 0x58 /* Power management coprocessor */
#define CFG_I2C_KBD_ADDR 0x50 /* Keyboard coprocessor */
#define CFG_I2C_TERM_ADDR 0x49 /* Temperature Sensors */
#define CFG_I2C_LCD_ADDR 0x8 /* LCD Control */
#define CFG_I2C_KEY_ADDR 0x9 /* Keyboard coprocessor */
#define CFG_I2C_TEM_ADDR 0x49 /* Temperature Sensors */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_DHCP | \
@@ -232,11 +232,7 @@
*-----------------------------------------------------------------------
* PCMCIA config., multi-function pin tri-state
*/
#ifndef CONFIG_CAN_DRIVER
#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#else /* we must activate GPL5 in the SIUMCR for CAN */
#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#endif /* CONFIG_CAN_DRIVER */
/*-----------------------------------------------------------------------
* TBSCR - Time Base Status and Control 11-26
@@ -362,20 +358,31 @@
/*
* BR1 and OR1 (SDRAM)
* BR2 and OR2 (SDRAM)
*
*/
#define SDRAM_BASE1_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
#define CFG_PRELIM_OR1_AM 0xF8000000 /* OR addr mask */
#define CFG_PRELIM_OR2_AM 0xF8000000 /* OR addr mask */
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
#define CFG_OR_TIMING_SDRAM (OR_ACS_DIV1 | OR_CSNT_SAM | \
OR_SCY_0_CLK | OR_G5LS)
#define CFG_OR1_PRELIM (CFG_PRELIM_OR1_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR1_PRELIM ((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
#define CFG_OR2_PRELIM (CFG_PRELIM_OR2_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
/*
* BR3 and OR3 (CAN Controller)
*/
#ifdef CONFIG_CAN_DRIVER
#define CFG_CAN_BASE 0xC0000000 /* CAN base address */
#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA |OR_BI)
#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
BR_PS_8 | BR_MS_UPMB | BR_V)
#endif /* CONFIG_CAN_DRIVER */
/*

473
include/configs/TQM862L.h Normal file
View File

@@ -0,0 +1,473 @@
/*
* (C) Copyright 2000, 2001, 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* board/config.h - configuration options, board specific
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_MPC860 1
#define CONFIG_MPC860T 1
#define CONFIG_MPC862 1
#define CONFIG_TQM862L 1 /* ...on a TQM8xxL module */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define CONFIG_BOARD_TYPES 1 /* support board types */
#define CONFIG_PREBOOT "echo;" \
"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
"echo"
#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
"addip=setenv bootargs $(bootargs) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
":$(hostname):$(netdev):off panic=1\0" \
"flash_nfs=run nfsargs addip;" \
"bootm $(kernel_addr)\0" \
"flash_self=run ramargs addip;" \
"bootm $(kernel_addr) $(ramdisk_addr)\0" \
"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM860L/uImage\0" \
"kernel_addr=40040000\0" \
"ramdisk_addr=40100000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
CFG_CMD_ASKENV | \
CFG_CMD_DHCP | \
CFG_CMD_IDE | \
CFG_CMD_DATE )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if 0
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#endif
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
/*-----------------------------------------------------------------------
* Internal Memory Mapped Register
*/
#define CFG_IMMR 0xFFF00000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CFG_INIT_RAM_ADDR CFG_IMMR
#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
#define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */
#define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */
#define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
* SYPCR can only be written once after reset!
*-----------------------------------------------------------------------
* Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
*/
#if defined(CONFIG_WATCHDOG)
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
#else
#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
#endif
/*-----------------------------------------------------------------------
* SIUMCR - SIU Module Configuration 11-6
*-----------------------------------------------------------------------
* PCMCIA config., multi-function pin tri-state
*/
#ifndef CONFIG_CAN_DRIVER
#define CFG_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#else /* we must activate GPL5 in the SIUMCR for CAN */
#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
#endif /* CONFIG_CAN_DRIVER */
/*-----------------------------------------------------------------------
* TBSCR - Time Base Status and Control 11-26
*-----------------------------------------------------------------------
* Clear Reference Interrupt Status, Timebase freezing enabled
*/
#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
/*-----------------------------------------------------------------------
* RTCSC - Real-Time Clock Status and Control Register 11-27
*-----------------------------------------------------------------------
*/
#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
/*-----------------------------------------------------------------------
* PISCR - Periodic Interrupt Status and Control 11-31
*-----------------------------------------------------------------------
* Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
*/
#define CFG_PISCR (PISCR_PS | PISCR_PITF)
/*-----------------------------------------------------------------------
* PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
*-----------------------------------------------------------------------
* Reset PLL lock status sticky bit, timer expired status bit and timer
* interrupt status bit
*
* If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
*/
#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */
#define CFG_PLPRCR \
( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
#else /* up to 50 MHz we use a 1:1 clock */
#define CFG_PLPRCR (PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
#endif /* CONFIG_80MHz */
/*-----------------------------------------------------------------------
* SCCR - System Clock and reset Control Register 15-27
*-----------------------------------------------------------------------
* Set clock output, timebase and RTC source and divider,
* power management and some other internal clocks
*/
#define SCCR_MASK SCCR_EBDF11
#ifdef CONFIG_80MHz /* for 80 MHz, we use a 16 MHz clock * 5 */
#define CFG_SCCR (/* SCCR_TBS | */ \
SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
SCCR_DFALCD00)
#else /* up to 50 MHz we use a 1:1 clock */
#define CFG_SCCR (SCCR_TBS | \
SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \
SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \
SCCR_DFALCD00)
#endif /* CONFIG_80MHz */
/*-----------------------------------------------------------------------
* PCMCIA stuff
*-----------------------------------------------------------------------
*
*/
#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
#define CFG_PCMCIA_DMA_SIZE ( 64 << 20 )
#define CFG_PCMCIA_ATTRB_ADDR (0xE8000000)
#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
#define CFG_PCMCIA_IO_ADDR (0xEC000000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
/*-----------------------------------------------------------------------
* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
*-----------------------------------------------------------------------
*/
#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
#undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
#define CFG_ATA_IDE0_OFFSET 0x0000
#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
/* Offset for data I/O */
#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
/* Offset for normal register accesses */
#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET 0x0100
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
*
*/
/*#define CFG_DER 0x2002000F*/
#define CFG_DER 0
/*
* Init Memory Controller:
*
* BR0/1 and OR0/1 (FLASH)
*/
#define FLASH_BASE0_PRELIM 0x40000000 /* FLASH bank #0 */
#define FLASH_BASE1_PRELIM 0x60000000 /* FLASH bank #0 */
/* used to re-map FLASH both when starting from SRAM or FLASH:
* restrict access enough to keep SRAM working (if any)
* but not too much to meddle with FLASH accesses
*/
#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
/*
* FLASH timing:
*/
#if defined(CONFIG_80MHz)
/* 80 MHz CPU - 40 MHz bus: ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | 0 | OR_CSNT_SAM | \
OR_SCY_3_CLK | OR_EHTR | OR_BI)
#elif defined(CONFIG_66MHz)
/* 66 MHz CPU - 66 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
OR_SCY_3_CLK | OR_EHTR | OR_BI)
#else /* 50 MHz */
/* 50 MHz CPU - 50 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 2, EHTR = 1 */
#define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
OR_SCY_2_CLK | OR_EHTR | OR_BI)
#endif /*CONFIG_??MHz */
#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
#define CFG_OR1_REMAP CFG_OR0_REMAP
#define CFG_OR1_PRELIM CFG_OR0_PRELIM
#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
/*
* BR2/3 and OR2/3 (SDRAM)
*
*/
#define SDRAM_BASE2_PRELIM 0x00000000 /* SDRAM bank #0 */
#define SDRAM_BASE3_PRELIM 0x20000000 /* SDRAM bank #1 */
#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB per bank */
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
#define CFG_OR_TIMING_SDRAM 0x00000A00
#define CFG_OR2_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
#define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
#ifndef CONFIG_CAN_DRIVER
#define CFG_OR3_PRELIM CFG_OR2_PRELIM
#define CFG_BR3_PRELIM ((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
#else /* CAN uses CS3#, so we can have only one SDRAM bank anyway */
#define CFG_CAN_BASE 0xC0000000 /* CAN mapped at 0xC0000000 */
#define CFG_CAN_OR_AM 0xFFFF8000 /* 32 kB address mask */
#define CFG_OR3_CAN (CFG_CAN_OR_AM | OR_G5LA | OR_BI)
#define CFG_BR3_CAN ((CFG_CAN_BASE & BR_BA_MSK) | \
BR_PS_8 | BR_MS_UPMB | BR_V )
#endif /* CONFIG_CAN_DRIVER */
/*
* Memory Periodic Timer Prescaler
*
* The Divider for PTA (refresh timer) configuration is based on an
* example SDRAM configuration (64 MBit, one bank). The adjustment to
* the number of chip selects (NCS) and the actually needed refresh
* rate is done by setting MPTPR.
*
* PTA is calculated from
* PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
*
* gclk CPU clock (not bus clock!)
* Trefresh Refresh cycle * 4 (four word bursts used)
*
* 4096 Rows from SDRAM example configuration
* 1000 factor s -> ms
* 32 PTP (pre-divider from MPTPR) from SDRAM example configuration
* 4 Number of refresh cycles per period
* 64 Refresh cycle in ms per number of rows
* --------------------------------------------
* Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
*
* 50 MHz => 50.000.000 / Divider = 98
* 66 Mhz => 66.000.000 / Divider = 129
* 80 Mhz => 80.000.000 / Divider = 156
*/
#if defined(CONFIG_80MHz)
#define CFG_MAMR_PTA 156
#elif defined(CONFIG_66MHz)
#define CFG_MAMR_PTA 129
#else /* 50 MHz */
#define CFG_MAMR_PTA 98
#endif /*CONFIG_??MHz */
/*
* For 16 MBit, refresh rates could be 31.3 us
* (= 64 ms / 2K = 125 / quad bursts).
* For a simpler initialization, 15.6 us is used instead.
*
* #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
* #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
*/
#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
/*
* MAMR settings for SDRAM
*/
/* 8 column SDRAM */
#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/* 9 column SDRAM */
#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_NET_MULTI
#define CONFIG_SCC1_ENET
#define CONFIG_FEC_ENET
#define CONFIG_ETHPRIME "SCC ETHERNET"
#endif /* __CONFIG_H */

View File

@@ -76,33 +76,33 @@
#define CONFIG_BOOTCOMMAND "run flash_self"
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr=40080000\0" \
"ramdisk_addr=40280000\0" \
"magic_keys=#3\0" \
"key_magic#=28\0" \
"key_cmd#=setenv addfb setenv bootargs \\$(bootargs) console=tty0\0" \
"key_magic3=3C+3F\0" \
"key_cmd3=echo *** Entering Test Mode ***;" \
"setenv add_misc setenv bootargs \\$(bootargs) testmode\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
"addfb=setenv bootargs $(bootargs) console=ttyS1,$(baudrate)\0" \
"addip=setenv bootargs $(bootargs) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \
"panic=1\0" \
"add_wdt=setenv bootargs $(bootargs) $(wdt_args)\0" \
"add_misc=setenv bootargs $(bootargs) runmode\0" \
"flash_nfs=run nfsargs addip add_wdt addfb add_misc;" \
"bootm $(kernel_addr)\0" \
"flash_self=run ramargs addip add_wdt addfb add_misc;" \
"bootm $(kernel_addr) $(ramdisk_addr)\0" \
"net_nfs=tftp 100000 /tftpboot/uImage.lwmon;" \
"run nfsargs addip add_wdt addfb;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"load=tftp 100000 /tftpboot/u-boot.bin\0" \
"update=protect off 1:0;era 1:0;cp.b 100000 40000000 $(filesize)\0" \
"wdt_args=wdt_8xx=off\0" \
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr=40080000\0" \
"ramdisk_addr=40280000\0" \
"magic_keys=#3\0" \
"key_magic#=28\0" \
"key_cmd#=setenv addfb setenv 'bootargs $bootargs console=tty0'\0" \
"key_magic3=3C+3F\0" \
"key_cmd3=echo *** Entering Test Mode ***;" \
"setenv add_misc 'setenv bootargs $bootargs testmode'\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
"addfb=setenv bootargs $bootargs console=ttyS1,$baudrate\0" \
"addip=setenv bootargs $bootargs " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
"panic=1\0" \
"add_wdt=setenv bootargs $bootargs $wdt_args\0" \
"add_misc=setenv bootargs $bootargs runmode\0" \
"flash_nfs=run nfsargs addip add_wdt addfb add_misc;" \
"bootm $kernel_addr\0" \
"flash_self=run ramargs addip add_wdt addfb add_misc;" \
"bootm $kernel_addr $ramdisk_addr\0" \
"net_nfs=tftp 100000 /tftpboot/uImage.lwmon;" \
"run nfsargs addip add_wdt addfb;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"load=tftp 100000 /tftpboot/u-boot.bin\0" \
"update=protect off 1:0;era 1:0;cp.b 100000 40000000 $filesize\0" \
"wdt_args=wdt_8xx=off\0" \
"verify=no"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
@@ -180,10 +180,10 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#undef CFG_HUSH_PARSER /* enable "hush" shell */
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#endif
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */

View File

@@ -24,6 +24,6 @@
#ifndef __VERSION_H__
#define __VERSION_H__
#define U_BOOT_VERSION "U-Boot 0.3.0"
#define U_BOOT_VERSION "U-Boot 0.3.1"
#endif /* __VERSION_H__ */

View File

@@ -56,6 +56,7 @@ ulong seed1, seed2;
#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
dhcp_state_t dhcp_state = INIT;
unsigned int dhcp_leasetime = 0;
IPaddr_t NetDHCPServerIP = 0;
static void DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len);
/* For Debug */
@@ -716,7 +717,7 @@ static void DhcpOptionsProcess(uchar *popt)
case 53: /* Ignore Message Type Option */
break;
case 54:
NetCopyIP(&NetServerIP, (popt+2));
NetCopyIP(&NetDHCPServerIP, (popt+2));
break;
case 58: /* Ignore Renewal Time Option */
break;
@@ -788,7 +789,7 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
* Copy options from OFFER packet if present
*/
NetCopyIP(&OfferedIP, &bp->bp_yiaddr);
extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, OfferedIP);
extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP);
pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen;
iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen;
@@ -832,11 +833,10 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
debug ("TRANSITIONING TO REQUESTING STATE\n");
dhcp_state = REQUESTING;
#if 0
if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
DhcpOptionsProcess(&bp->bp_vend[4]);
#endif
BootpCopyNetParams(bp); /* Store net params from reply */
NetSetTimeout(TIMEOUT * CFG_HZ, BootpTimeout);

View File

@@ -27,6 +27,7 @@
defined(CONFIG_MPC850) || \
defined(CONFIG_MPC855) || \
defined(CONFIG_MPC860) || \
defined(CONFIG_MPC862) || \
defined(CONFIG_MPC824X)
#include <post.h>

484
tools/env/fw_env.c vendored
View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2000
* (C) Copyright 2000-2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -12,7 +12,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -34,16 +34,16 @@
#include <linux/mtd/mtd.h>
#include "fw_env.h"
typedef unsigned char uchar;
typedef unsigned char uchar;
#define CMD_GETENV "fw_printenv"
#define CMD_SETENV "fw_setenv"
typedef struct envdev_s {
uchar devname[16]; /* Device name */
ulong devoff; /* Device offset */
ulong env_size; /* environment size */
ulong erase_size; /* device erase size */
uchar devname[16]; /* Device name */
ulong devoff; /* Device offset */
ulong env_size; /* environment size */
ulong erase_size; /* device erase size */
} envdev_t;
static envdev_t envdevices[2];
@@ -59,8 +59,8 @@ static int curdev;
#define ENV_SIZE getenvsize()
typedef struct environment_s {
ulong crc; /* CRC32 over data bytes */
uchar flags; /* active or obsolete */
ulong crc; /* CRC32 over data bytes */
uchar flags; /* active or obsolete */
uchar *data;
} env_t;
@@ -77,92 +77,94 @@ static uchar obsolete_flag = 0;
static uchar default_environment[] = {
#if defined(CONFIG_BOOTARGS)
"bootargs=" CONFIG_BOOTARGS "\0"
"bootargs=" CONFIG_BOOTARGS "\0"
#endif
#if defined(CONFIG_BOOTCOMMAND)
"bootcmd=" CONFIG_BOOTCOMMAND "\0"
"bootcmd=" CONFIG_BOOTCOMMAND "\0"
#endif
#if defined(CONFIG_RAMBOOTCOMMAND)
"ramboot=" CONFIG_RAMBOOTCOMMAND "\0"
"ramboot=" CONFIG_RAMBOOTCOMMAND "\0"
#endif
#if defined(CONFIG_NFSBOOTCOMMAND)
"nfsboot=" CONFIG_NFSBOOTCOMMAND "\0"
"nfsboot=" CONFIG_NFSBOOTCOMMAND "\0"
#endif
#if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
"bootdelay=" MK_STR(CONFIG_BOOTDELAY) "\0"
"bootdelay=" MK_STR (CONFIG_BOOTDELAY) "\0"
#endif
#if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0)
"baudrate=" MK_STR(CONFIG_BAUDRATE) "\0"
"baudrate=" MK_STR (CONFIG_BAUDRATE) "\0"
#endif
#ifdef CONFIG_LOADS_ECHO
"loads_echo=" MK_STR(CONFIG_LOADS_ECHO) "\0"
"loads_echo=" MK_STR (CONFIG_LOADS_ECHO) "\0"
#endif
#ifdef CONFIG_ETHADDR
"ethaddr=" MK_STR(CONFIG_ETHADDR) "\0"
"ethaddr=" MK_STR (CONFIG_ETHADDR) "\0"
#endif
#ifdef CONFIG_ETH1ADDR
"eth1addr=" MK_STR(CONFIG_ETH1ADDR) "\0"
"eth1addr=" MK_STR (CONFIG_ETH1ADDR) "\0"
#endif
#ifdef CONFIG_ETH2ADDR
"eth2addr=" MK_STR(CONFIG_ETH2ADDR) "\0"
"eth2addr=" MK_STR (CONFIG_ETH2ADDR) "\0"
#endif
#ifdef CONFIG_ETHPRIME
"ethprime=" CONFIG_ETHPRIME "\0"
"ethprime=" CONFIG_ETHPRIME "\0"
#endif
#ifdef CONFIG_IPADDR
"ipaddr=" MK_STR(CONFIG_IPADDR) "\0"
"ipaddr=" MK_STR (CONFIG_IPADDR) "\0"
#endif
#ifdef CONFIG_SERVERIP
"serverip=" MK_STR(CONFIG_SERVERIP) "\0"
"serverip=" MK_STR (CONFIG_SERVERIP) "\0"
#endif
#ifdef CFG_AUTOLOAD
"autoload=" CFG_AUTOLOAD "\0"
"autoload=" CFG_AUTOLOAD "\0"
#endif
#ifdef CONFIG_ROOTPATH
"rootpath=" MK_STR(CONFIG_ROOTPATH) "\0"
"rootpath=" MK_STR (CONFIG_ROOTPATH) "\0"
#endif
#ifdef CONFIG_GATEWAYIP
"gatewayip=" MK_STR(CONFIG_GATEWAYIP) "\0"
"gatewayip=" MK_STR (CONFIG_GATEWAYIP) "\0"
#endif
#ifdef CONFIG_NETMASK
"netmask=" MK_STR(CONFIG_NETMASK) "\0"
"netmask=" MK_STR (CONFIG_NETMASK) "\0"
#endif
#ifdef CONFIG_HOSTNAME
"hostname=" MK_STR(CONFIG_HOSTNAME) "\0"
"hostname=" MK_STR (CONFIG_HOSTNAME) "\0"
#endif
#ifdef CONFIG_BOOTFILE
"bootfile=" MK_STR(CONFIG_BOOTFILE) "\0"
"bootfile=" MK_STR (CONFIG_BOOTFILE) "\0"
#endif
#ifdef CONFIG_LOADADDR
"loadaddr=" MK_STR(CONFIG_LOADADDR) "\0"
"loadaddr=" MK_STR (CONFIG_LOADADDR) "\0"
#endif
#ifdef CONFIG_PREBOOT
"preboot=" CONFIG_PREBOOT "\0"
"preboot=" CONFIG_PREBOOT "\0"
#endif
#ifdef CONFIG_CLOCKS_IN_MHZ
"clocks_in_mhz=" "1" "\0"
"clocks_in_mhz=" "1" "\0"
#endif
#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
"pcidelay=" MK_STR(CONFIG_PCI_BOOTDELAY) "\0"
"pcidelay=" MK_STR (CONFIG_PCI_BOOTDELAY) "\0"
#endif
#ifdef CONFIG_EXTRA_ENV_SETTINGS
CONFIG_EXTRA_ENV_SETTINGS
#endif
"\0" /* Termimate env_t data with 2 NULs */
"\0" /* Termimate env_t data with 2 NULs */
};
static int flash_io (int mode);
static uchar *envmatch(uchar *s1, uchar *s2);
static int env_init(void);
static int parse_config(void);
static int flash_io (int mode);
static uchar *envmatch (uchar * s1, uchar * s2);
static int env_init (void);
static int parse_config (void);
#if defined(CONFIG_FILE)
static int get_config(char *);
static int get_config (char *);
#endif
static inline ulong getenvsize(void)
static inline ulong getenvsize (void)
{
ulong rc = CFG_ENV_SIZE - sizeof(long);
ulong rc = CFG_ENV_SIZE - sizeof (long);
if (HaveRedundEnv)
rc -= sizeof(char);
rc -= sizeof (char);
return rc;
}
@@ -174,20 +176,20 @@ unsigned char *fw_getenv (unsigned char *name)
{
uchar *env, *nxt;
if (env_init())
if (env_init ())
return (NULL);
for (env=environment.data; *env; env=nxt+1) {
for (env = environment.data; *env; env = nxt + 1) {
uchar *val;
for (nxt=env; *nxt; ++nxt) {
for (nxt = env; *nxt; ++nxt) {
if (nxt >= &environment.data[ENV_SIZE]) {
fprintf (stderr, "## Error: "
"environment not terminated\n");
return (NULL);
}
}
val=envmatch(name, env);
val = envmatch (name, env);
if (!val)
continue;
return (val);
@@ -199,17 +201,17 @@ unsigned char *fw_getenv (unsigned char *name)
* Print the current definition of one, or more, or all
* environment variables
*/
void fw_printenv(int argc, char *argv[])
void fw_printenv (int argc, char *argv[])
{
uchar *env, *nxt;
int i, n_flag;
if (env_init())
if (env_init ())
return;
if (argc == 1) { /* Print all env variables */
for (env=environment.data; *env; env=nxt+1) {
for (nxt=env; *nxt; ++nxt) {
if (argc == 1) { /* Print all env variables */
for (env = environment.data; *env; env = nxt + 1) {
for (nxt = env; *nxt; ++nxt) {
if (nxt >= &environment.data[ENV_SIZE]) {
fprintf (stderr, "## Error: "
"environment not terminated\n");
@@ -217,12 +219,12 @@ void fw_printenv(int argc, char *argv[])
}
}
printf("%s\n", env);
printf ("%s\n", env);
}
return;
}
if (strcmp(argv[1], "-n") == 0) {
if (strcmp (argv[1], "-n") == 0) {
n_flag = 1;
++argv;
--argc;
@@ -235,32 +237,31 @@ void fw_printenv(int argc, char *argv[])
n_flag = 0;
}
for (i=1; i<argc; ++i) { /* print single env variables */
for (i = 1; i < argc; ++i) { /* print single env variables */
uchar *name = argv[i];
uchar *val = NULL;
for (env=environment.data; *env; env=nxt+1) {
for (env = environment.data; *env; env = nxt + 1) {
for (nxt=env; *nxt; ++nxt) {
for (nxt = env; *nxt; ++nxt) {
if (nxt >= &environment.data[ENV_SIZE]) {
fprintf (stderr, "## Error: "
"environment not terminated\n");
return;
}
}
val=envmatch(name, env);
val = envmatch (name, env);
if (val) {
if (!n_flag) {
fputs (name, stdout);
putc ('=', stdout);
putc ('=', stdout);
}
puts (val);
puts (val);
break;
}
}
if (!val)
fprintf (stderr, "## Error: \"%s\" not defined\n",
name);
fprintf (stderr, "## Error: \"%s\" not defined\n", name);
}
}
@@ -274,7 +275,7 @@ void fw_printenv(int argc, char *argv[])
*/
int fw_setenv (int argc, char *argv[])
{
int i, len;
int i, len;
uchar *env, *nxt;
uchar *oldval = NULL;
uchar *name;
@@ -283,7 +284,7 @@ int fw_setenv (int argc, char *argv[])
return (EINVAL);
}
if (env_init())
if (env_init ())
return (errno);
name = argv[1];
@@ -291,15 +292,15 @@ int fw_setenv (int argc, char *argv[])
/*
* search if variable with this name already exists
*/
for (env=environment.data; *env; env=nxt+1) {
for (nxt=env; *nxt; ++nxt) {
for (nxt = env = environment.data; *env; env = nxt + 1) {
for (nxt = env; *nxt; ++nxt) {
if (nxt >= &environment.data[ENV_SIZE]) {
fprintf (stderr, "## Error: "
"environment not terminated\n");
return (EINVAL);
}
}
if ((oldval=envmatch(name, env)) != NULL)
if ((oldval = envmatch (name, env)) != NULL)
break;
}
@@ -311,7 +312,7 @@ int fw_setenv (int argc, char *argv[])
* Ethernet Address and serial# can be set only once
*/
if ((strcmp (name, "ethaddr") == 0) ||
(strcmp (name, "serial#") == 0) ) {
(strcmp (name, "serial#") == 0)) {
fprintf (stderr, "Can't overwrite \"%s\"\n", name);
return (EROFS);
}
@@ -336,20 +337,19 @@ int fw_setenv (int argc, char *argv[])
/*
* Append new definition at the end
*/
for (env=environment.data; *env || *(env+1); ++env)
;
for (env = environment.data; *env || *(env + 1); ++env);
if (env > environment.data)
++env;
/*
* Overflow when:
* "name" + "=" + "val" +"\0\0" > CFG_ENV_SIZE - (env-environment)
*/
len = strlen(name) + 2;
len = strlen (name) + 2;
/* add '=' for first arg, ' ' for all others */
for (i=2; i<argc; ++i) {
len += strlen(argv[i]) + 1;
for (i = 2; i < argc; ++i) {
len += strlen (argv[i]) + 1;
}
if (len > (&environment.data[ENV_SIZE]-env)) {
if (len > (&environment.data[ENV_SIZE] - env)) {
fprintf (stderr,
"Error: environment overflow, \"%s\" deleted\n",
name);
@@ -357,26 +357,24 @@ int fw_setenv (int argc, char *argv[])
}
while ((*env = *name++) != '\0')
env++;
for (i=2; i<argc; ++i) {
for (i = 2; i < argc; ++i) {
uchar *val = argv[i];
*env = (i==2) ? '=' : ' ';
while ((*++env = *val++) != '\0')
;
*env = (i == 2) ? '=' : ' ';
while ((*++env = *val++) != '\0');
}
/* end is marked with double '\0' */
*++env = '\0';
WRITE_FLASH:
WRITE_FLASH:
/* Update CRC */
environment.crc = crc32(0, environment.data, ENV_SIZE);
environment.crc = crc32 (0, environment.data, ENV_SIZE);
/* write environment back to flash */
if (flash_io (O_RDWR)) {
fprintf (stderr,
"Error: can't write fw_env to flash\n");
fprintf (stderr, "Error: can't write fw_env to flash\n");
return (-1);
}
@@ -389,166 +387,172 @@ static int flash_io (int mode)
erase_info_t erase;
char *data;
if ((fd = open(DEVNAME(curdev), mode)) < 0) {
fprintf (stderr,
"Can't open %s: %s\n",
DEVNAME(curdev), strerror(errno));
if ((fd = open (DEVNAME (curdev), mode)) < 0) {
fprintf (stderr,
"Can't open %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
len = sizeof(environment.crc);
len = sizeof (environment.crc);
if (HaveRedundEnv) {
len += sizeof(environment.flags);
len += sizeof (environment.flags);
}
if (mode == O_RDWR) {
if (HaveRedundEnv) {
/* switch to next partition for writing */
otherdev = !curdev;
if ((fdr = open(DEVNAME(otherdev), mode)) < 0) {
fprintf (stderr,
"Can't open %s: %s\n",
DEVNAME(otherdev), strerror(errno));
if ((fdr = open (DEVNAME (otherdev), mode)) < 0) {
fprintf (stderr,
"Can't open %s: %s\n",
DEVNAME (otherdev),
strerror (errno));
return (-1);
}
} else {
otherdev = curdev;
fdr = fd;
}
printf("Unlocking flash...\n");
erase.length = DEVESIZE(otherdev);
erase.start = DEVOFFSET(otherdev);
printf ("Unlocking flash...\n");
erase.length = DEVESIZE (otherdev);
erase.start = DEVOFFSET (otherdev);
ioctl (fdr, MEMUNLOCK, &erase);
if (HaveRedundEnv) {
erase.length = DEVESIZE(curdev);
erase.start = DEVOFFSET(curdev);
erase.length = DEVESIZE (curdev);
erase.start = DEVOFFSET (curdev);
ioctl (fd, MEMUNLOCK, &erase);
environment.flags = active_flag;
}
printf("Done\n");
resid = DEVESIZE(otherdev) - CFG_ENV_SIZE;
printf ("Done\n");
resid = DEVESIZE (otherdev) - CFG_ENV_SIZE;
if (resid) {
if ((data = malloc(resid)) == NULL) {
fprintf(stderr,
"Cannot malloc %d bytes: %s\n",
resid, strerror(errno));
if ((data = malloc (resid)) == NULL) {
fprintf (stderr,
"Cannot malloc %d bytes: %s\n",
resid,
strerror (errno));
return (-1);
}
if (lseek (fdr, DEVOFFSET(otherdev) + CFG_ENV_SIZE, SEEK_SET) == -1) {
fprintf (stderr,
"seek error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
if (lseek (fdr, DEVOFFSET (otherdev) + CFG_ENV_SIZE, SEEK_SET)
== -1) {
fprintf (stderr, "seek error on %s: %s\n",
DEVNAME (otherdev),
strerror (errno));
return (-1);
}
if ((rc = read (fdr, data, resid)) != resid) {
fprintf (stderr,
"read error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
"read error on %s: %s\n",
DEVNAME (otherdev),
strerror (errno));
return (-1);
}
}
printf("Erasing old environment...\n");
printf ("Erasing old environment...\n");
erase.length = DEVESIZE(otherdev);
erase.start = DEVOFFSET(otherdev);
erase.length = DEVESIZE (otherdev);
erase.start = DEVOFFSET (otherdev);
if (ioctl (fdr, MEMERASE, &erase) != 0) {
fprintf (stderr, "MTD erase error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
DEVNAME (otherdev),
strerror (errno));
return (-1);
}
printf("Done\n");
printf ("Done\n");
printf("Writing environment to %s...\n",DEVNAME(otherdev));
if (lseek (fdr, DEVOFFSET(otherdev), SEEK_SET) == -1) {
printf ("Writing environment to %s...\n", DEVNAME (otherdev));
if (lseek (fdr, DEVOFFSET (otherdev), SEEK_SET) == -1) {
fprintf (stderr,
"seek error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
"seek error on %s: %s\n",
DEVNAME (otherdev), strerror (errno));
return (-1);
}
if (write(fdr, &environment, len) != len) {
if (write (fdr, &environment, len) != len) {
fprintf (stderr,
"CRC write error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
"CRC write error on %s: %s\n",
DEVNAME (otherdev), strerror (errno));
return (-1);
}
if (write(fdr, environment.data, ENV_SIZE) != ENV_SIZE) {
if (write (fdr, environment.data, ENV_SIZE) != ENV_SIZE) {
fprintf (stderr,
"Write error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
"Write error on %s: %s\n",
DEVNAME (otherdev), strerror (errno));
return (-1);
}
if (resid) {
if (write (fdr, data, resid) != resid) {
fprintf (stderr,
"write error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"write error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
free(data);
free (data);
}
if (HaveRedundEnv) {
/* change flag on current active env partition */
if (lseek (fd, DEVOFFSET(curdev) + sizeof(ulong), SEEK_SET) == -1) {
fprintf (stderr,
"seek error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
if (lseek (fd, DEVOFFSET (curdev) + sizeof (ulong), SEEK_SET)
== -1) {
fprintf (stderr, "seek error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
if (write (fd, &obsolete_flag, sizeof(obsolete_flag)) !=
sizeof(obsolete_flag)) {
if (write (fd, &obsolete_flag, sizeof (obsolete_flag)) !=
sizeof (obsolete_flag)) {
fprintf (stderr,
"Write error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"Write error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
}
printf("Done\n");
printf("Locking ...\n");
erase.length = DEVESIZE(otherdev);
erase.start = DEVOFFSET(otherdev);
printf ("Done\n");
printf ("Locking ...\n");
erase.length = DEVESIZE (otherdev);
erase.start = DEVOFFSET (otherdev);
ioctl (fdr, MEMLOCK, &erase);
if (HaveRedundEnv) {
erase.length = DEVESIZE(curdev);
erase.start = DEVOFFSET(curdev);
erase.length = DEVESIZE (curdev);
erase.start = DEVOFFSET (curdev);
ioctl (fd, MEMLOCK, &erase);
if (close(fdr)) {
if (close (fdr)) {
fprintf (stderr,
"I/O error on %s: %s\n",
DEVNAME(otherdev), strerror(errno));
"I/O error on %s: %s\n",
DEVNAME (otherdev),
strerror (errno));
return (-1);
}
}
printf("Done\n");
printf ("Done\n");
} else {
if (lseek (fd, DEVOFFSET(curdev), SEEK_SET) == -1) {
if (lseek (fd, DEVOFFSET (curdev), SEEK_SET) == -1) {
fprintf (stderr,
"seek error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"seek error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
if (read (fd, &environment, len) != len) {
fprintf (stderr,
"CRC read error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"CRC read error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
if ((rc = read (fd, environment.data, ENV_SIZE)) != ENV_SIZE) {
fprintf (stderr,
"Read error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"Read error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
}
if (close(fd)) {
if (close (fd)) {
fprintf (stderr,
"I/O error on %s: %s\n",
DEVNAME(curdev), strerror(errno));
"I/O error on %s: %s\n",
DEVNAME (curdev), strerror (errno));
return (-1);
}
@@ -562,22 +566,21 @@ static int flash_io (int mode)
* If the names match, return the value of s2, else NULL.
*/
static uchar *
envmatch (uchar *s1, uchar *s2)
static uchar *envmatch (uchar * s1, uchar * s2)
{
while (*s1 == *s2++)
if (*s1++ == '=')
return(s2);
if (*s1 == '\0' && *(s2-1) == '=')
return(s2);
return(NULL);
return (s2);
if (*s1 == '\0' && *(s2 - 1) == '=')
return (s2);
return (NULL);
}
/*
* Prevent confusion if running from erased flash memory
*/
static int env_init(void)
static int env_init (void)
{
int crc1, crc1_ok;
uchar *addr1;
@@ -585,151 +588,142 @@ static int env_init(void)
int crc2, crc2_ok;
uchar flag1, flag2, *addr2;
if (parse_config()) /* should fill envdevices */
if (parse_config ()) /* should fill envdevices */
return 1;
if ((addr1 = calloc (1, ENV_SIZE)) == NULL) {
fprintf (stderr,
"Not enough memory for environment (%ld bytes)\n",
ENV_SIZE);
fprintf (stderr,
"Not enough memory for environment (%ld bytes)\n",
ENV_SIZE);
return (errno);
}
/* read environment from FLASH to local buffer */
environment.data = addr1;
curdev = 0;
if (flash_io (O_RDONLY)) {
return (errno);
}
crc1_ok = ((crc1 = crc32(0, environment.data, ENV_SIZE))
crc1_ok = ((crc1 = crc32 (0, environment.data, ENV_SIZE))
== environment.crc);
if (!HaveRedundEnv) {
if (!crc1_ok) {
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
environment.data = default_environment;
free(addr1);
free (addr1);
}
} else {
flag1 = environment.flags;
curdev = 1;
if ((addr2 = calloc (1, ENV_SIZE)) == NULL) {
fprintf (stderr,
"Not enough memory for environment (%ld bytes)\n",
ENV_SIZE);
fprintf (stderr,
"Not enough memory for environment (%ld bytes)\n",
ENV_SIZE);
return (errno);
}
}
environment.data = addr2;
if (flash_io (O_RDONLY)) {
return (errno);
}
crc2_ok = ((crc2 = crc32(0, environment.data, ENV_SIZE))
crc2_ok = ((crc2 = crc32 (0, environment.data, ENV_SIZE))
== environment.crc);
flag2 = environment.flags;
if (crc1_ok && ! crc2_ok) {
environment.data = addr1;
if (crc1_ok && !crc2_ok) {
environment.data = addr1;
environment.flags = flag1;
environment.crc = crc1;
curdev = 0;
free(addr2);
}
else if (! crc1_ok && crc2_ok) {
environment.data = addr2;
free (addr2);
} else if (!crc1_ok && crc2_ok) {
environment.data = addr2;
environment.flags = flag2;
environment.crc = crc2;
curdev = 1;
free(addr1);
}
else if (! crc1_ok && ! crc2_ok) {
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
free (addr1);
} else if (!crc1_ok && !crc2_ok) {
fprintf (stderr,
"Warning: Bad CRC, using default environment\n");
environment.data = default_environment;
curdev = 0;
free(addr2);
free(addr1);
}
else if (flag1 == active_flag && flag2 == obsolete_flag) {
environment.data = addr1;
free (addr2);
free (addr1);
} else if (flag1 == active_flag && flag2 == obsolete_flag) {
environment.data = addr1;
environment.flags = flag1;
environment.crc = crc1;
curdev = 0;
free(addr2);
}
else if (flag1 == obsolete_flag && flag2 == active_flag) {
environment.data = addr2;
free (addr2);
} else if (flag1 == obsolete_flag && flag2 == active_flag) {
environment.data = addr2;
environment.flags = flag2;
environment.crc = crc2;
curdev = 1;
free(addr1);
}
else if (flag1 == flag2) {
environment.data = addr1;
free (addr1);
} else if (flag1 == flag2) {
environment.data = addr1;
environment.flags = flag1;
environment.crc = crc1;
curdev = 0;
free(addr2);
}
else if (flag1 == 0xFF) {
environment.data = addr1;
free (addr2);
} else if (flag1 == 0xFF) {
environment.data = addr1;
environment.flags = flag1;
environment.crc = crc1;
curdev = 0;
free(addr2);
}
else if (flag2 == 0xFF) {
environment.data = addr2;
free (addr2);
} else if (flag2 == 0xFF) {
environment.data = addr2;
environment.flags = flag2;
environment.crc = crc2;
curdev = 1;
free(addr1);
free (addr1);
}
}
return (0);
}
static int parse_config()
static int parse_config ()
{
struct stat st;
#if defined(CONFIG_FILE)
/* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */
if (get_config(CONFIG_FILE)) {
if (get_config (CONFIG_FILE)) {
fprintf (stderr,
"Cannot parse config file: %s\n",
strerror(errno));
"Cannot parse config file: %s\n", strerror (errno));
return 1;
}
#else
strcpy(DEVNAME(0), DEVICE1_NAME);
DEVOFFSET(0) = DEVICE1_OFFSET;
ENVSIZE(0) = ENV1_SIZE;
DEVESIZE(0) = DEVICE1_ESIZE;
strcpy (DEVNAME (0), DEVICE1_NAME);
DEVOFFSET (0) = DEVICE1_OFFSET;
ENVSIZE (0) = ENV1_SIZE;
DEVESIZE (0) = DEVICE1_ESIZE;
#ifdef HAVE_REDUND
strcpy(DEVNAME(1), DEVICE2_NAME);
DEVOFFSET(1) = DEVICE2_OFFSET;
ENVSIZE(1) = ENV2_SIZE;
DEVESIZE(1) = DEVICE2_ESIZE;
strcpy (DEVNAME (1), DEVICE2_NAME);
DEVOFFSET (1) = DEVICE2_OFFSET;
ENVSIZE (1) = ENV2_SIZE;
DEVESIZE (1) = DEVICE2_ESIZE;
HaveRedundEnv = 1;
#endif
#endif
if (stat (DEVNAME(0), &st)) {
fprintf (stderr,
"Cannot access MTD device %s: %s\n",
DEVNAME(0), strerror(errno));
if (stat (DEVNAME (0), &st)) {
fprintf (stderr,
"Cannot access MTD device %s: %s\n",
DEVNAME (0), strerror (errno));
return 1;
}
if (HaveRedundEnv && stat (DEVNAME(1), &st)) {
fprintf (stderr,
"Cannot access MTD device %s: %s\n",
DEVNAME(2), strerror(errno));
if (HaveRedundEnv && stat (DEVNAME (1), &st)) {
fprintf (stderr,
"Cannot access MTD device %s: %s\n",
DEVNAME (2), strerror (errno));
return 1;
}
return 0;
@@ -743,26 +737,28 @@ static int get_config (char *fname)
int rc;
char dump[128];
if ((fp = fopen(fname, "r")) == NULL) {
if ((fp = fopen (fname, "r")) == NULL) {
return 1;
}
while ((i < 2) &&
((rc = fscanf (fp, "%s %lx %lx %lx",
DEVNAME(i), &DEVOFFSET(i), &ENVSIZE(i), &DEVESIZE(i))) != EOF)) {
while ((i < 2) && ((rc = fscanf (fp, "%s %lx %lx %lx",
DEVNAME (i),
&DEVOFFSET (i),
&ENVSIZE (i),
&DEVESIZE (i) )) != EOF)) {
/* Skip incomplete conversions and comment strings */
if ((rc < 3) || (*DEVNAME(i) == '#')) {
fgets (dump, sizeof(dump), fp); /* Consume till end */
if ((rc < 3) || (*DEVNAME (i) == '#')) {
fgets (dump, sizeof (dump), fp); /* Consume till end */
continue;
}
i++;
}
fclose(fp);
fclose (fp);
HaveRedundEnv = i - 1;
if (!i) { /* No valid entries found */
if (!i) { /* No valid entries found */
errno = EINVAL;
return 1;
} else