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2e52030584
With commit0535e46d55("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit85f586035d("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Aligns the final section before _end (for U-Boot) or _image_binary_end (for xPL phases) by 8-bytes by adjusting the ALIGN(4) statement to be ALIGN(8) in the final section before the symbol. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). Tested-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
67 lines
1.0 KiB
Plaintext
67 lines
1.0 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2013 - 2014 Xilinx, Inc
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <asm-offsets.h>
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OUTPUT_ARCH(microblaze)
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ENTRY(_start)
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SECTIONS
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{
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.text ALIGN(0x4):
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{
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__text_start = .;
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arch/microblaze/cpu/start.o (.text)
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*(.text)
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*(.text.*)
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__text_end = .;
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}
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.rodata ALIGN(0x4):
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{
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__rodata_start = .;
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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__rodata_end = .;
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}
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.data ALIGN(0x4):
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{
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__data_start = .;
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*(.data)
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*(.data.*)
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__data_end = .;
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}
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. = ALIGN(4);
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__u_boot_list : {
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KEEP(*(SORT(__u_boot_list*)));
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}
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__init_end = . ;
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.bss ALIGN(0x4):
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{
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__bss_start = .;
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*(.sbss)
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*(.scommon)
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(8);
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__bss_end = .;
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}
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_end = . ;
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_image_binary_end = .;
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}
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#if defined(CONFIG_SPL_MAX_FOOTPRINT)
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ASSERT(_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \
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"SPL image plus BSS too big");
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#endif
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ASSERT(_image_binary_end % 8 == 0, \
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"_image_binary_end must be 8-byte aligned for device tree");
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