Files
u-boot/arch/riscv/cpu/mpfs/Kconfig
Heinrich Schuchardt 12a9c83cba riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist
Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.

MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
So we don't need CONFIG_(SPL_)ACLINT either.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-03-13 02:57:58 +08:00

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# SPDX-License-Identifier: GPL-2.0+
config MICROCHIP_MPFS
bool
select ARCH_EARLY_INIT_R
imply CPU
imply CPU_RISCV
imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
imply CMD_CPU
imply SPL_CPU
imply SPL_OPENSBI
imply SPL_LOAD_FIT
imply REGMAP
imply SYSCON
imply CLK_CCF
imply CLK_MPFS
imply SYS_NS16550
imply MACB
imply MII
imply CMD_I2C
imply DM_I2C
imply SYS_I2C_MICROCHIP
imply MMC
imply MMC_WRITE
imply MMC_SDHCI
imply MMC_SDHCI_CADENCE
imply MMC_SDHCI_ADMA
imply MMC_HS200_SUPPORT
imply SPI
imply DM_SPI
imply MICROCHIP_QSPI