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3fa7b1055b
i.MX95 uses System Manager(sm) API to start/stop logical machine or cpu. There are two modes: M7 in a dedicated logical machine, use LMM API M7 and A55 in same logical machine, use CPU API Extend the driver to using LMM and CPU protocol to manage the M7 core: - Detect using LMM or CPU API in probe using API scmi_imx_lmm_info(). - Compare linux LM ID(got using scmi_imx_lmm_info) and M7 LM ID(the ID is fixed as 1 in SM firmware if M7 is in a separate LM), if Linux LM ID is not same as M7 LM ID(linux and M7 in same LM), use LMM protocol to start/stop. Whether using CPU or LMM protocol to start/stop, the M7 status detection could use CPU protocol to detect started or not. So in imx_rproc_is_running, use scmi_imx_cpu_started to check the status of M7. - For above case (2), Use scmi_imx_lmm_power_boot to detect whether the M7 LM is under control of A55 LM. - For above case , after using SCMI_IMX_LMM_POWER_ON to check permission, scmi_imx_lmm_shutdown API should be called to shutdown the M7 LM. - Add a new ops imx_rproc_ops_sm. Signed-off-by: Peng Fan <peng.fan@nxp.com>
60 lines
1.3 KiB
C
60 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
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* Copyright 2021 NXP
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*/
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#ifndef _IMX_RPROC_H
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#define _IMX_RPROC_H
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/* address translation table */
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struct imx_rproc_att {
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u32 da; /* device address (From Cortex M4 view)*/
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u32 sa; /* system bus address */
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u32 size; /* size of reg range */
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int flags;
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};
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/* Remote core start/stop method */
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enum imx_rproc_method {
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IMX_RPROC_NONE,
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/* Through syscon regmap */
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IMX_RPROC_MMIO,
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/* Through ARM SMCCC */
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IMX_RPROC_SMC,
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/* Through System Control Unit API */
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IMX_RPROC_SCU_API,
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/* Through Reset Controller API */
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IMX_RPROC_RESET_CONTROLLER,
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/* Through System Manager */
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IMX_RPROC_SM,
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};
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/* dcfg flags */
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#define IMX_RPROC_NEED_SYSTEM_OFF BIT(0)
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struct imx_rproc_plat_ops {
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int (*start)(struct udevice *dev);
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int (*stop)(struct udevice *dev);
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int (*is_running)(struct udevice *dev);
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};
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struct imx_rproc_dcfg {
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u32 src_reg;
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u32 src_mask;
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u32 src_start;
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u32 src_stop;
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u32 gpr_reg;
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u32 gpr_wait;
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const struct imx_rproc_att *att;
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size_t att_size;
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enum imx_rproc_method method;
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u32 flags;
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const struct imx_rproc_plat_ops *ops;
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/* For System Manager(SM) based SoCs, the IDs are from SM firmware */
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u32 cpuid;
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u32 lmid;
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};
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#endif /* _IMX_RPROC_H */
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