mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
e80108c966
When commit1d7993d1d0("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)") introduced the parts of Linux Common Clock Framework, it was done for i.MX6 only and even had "depends on SPL_CLK_IMX6Q" conditions. Since commitccab06689a("clk: imx: expose CCF entry for all") the framework can be reused with SoCs of other vendors (say, TI), but NXP SoC-specific code is still being build. It is especially problematic for size-constrained SPL images on TI AM62x. Make the build of the i.MX/RTxxxx code not only dependent on CONFIG_$(PHASE_)CLK_CCF, but also on CONFIG_MACH_IMX options which shall cover the i.MX platform users. This saves 2264 bytes on 32-bit ARM platforms [using CCF]. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
64 lines
2.3 KiB
Makefile
64 lines
2.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (c) 2015 Google, Inc
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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obj-$(CONFIG_$(PHASE_)CLK) += clk-uclass.o
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obj-$(CONFIG_$(PHASE_)CLK) += clk_fixed_rate.o
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obj-$(CONFIG_$(PHASE_)CLK) += clk_fixed_factor.o
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obj-$(CONFIG_$(PHASE_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o
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obj-$(CONFIG_$(PHASE_)CLK_CCF) += clk-fixed-factor.o
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obj-$(CONFIG_$(PHASE_)CLK_COMPOSITE_CCF) += clk-composite.o
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obj-$(CONFIG_$(PHASE_)CLK_GPIO) += clk-gpio.o
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obj-$(CONFIG_$(PHASE_)CLK_STUB) += clk-stub.o
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obj-y += adi/
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obj-y += airoha/
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obj-y += analogbits/
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obj-$(CONFIG_MACH_IMX) += imx/
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obj-$(CONFIG_CLK_JH7110) += starfive/
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obj-y += tegra/
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obj-y += ti/
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obj-$(CONFIG_CLK_THEAD) += thead/
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obj-$(CONFIG_$(PHASE_)CLK_INTEL) += intel/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_ARCH_MESON) += meson/
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obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
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obj-$(CONFIG_ARCH_NPCM) += nuvoton/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_ARCH_SOCFPGA) += altera/
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obj-$(CONFIG_ARCH_STM32) += stm32/
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obj-$(CONFIG_ARCH_STM32MP) += stm32/
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obj-$(CONFIG_CLK_AT91) += at91/
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obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
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obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
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obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
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obj-$(CONFIG_CLK_EXYNOS) += exynos/
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obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
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obj-$(CONFIG_CLK_K210) += clk_k210.o
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obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
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obj-$(CONFIG_CLK_MPFS) += microchip/
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obj-$(CONFIG_CLK_MVEBU) += mvebu/
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obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
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obj-$(CONFIG_CLK_OWL) += owl/
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obj-$(CONFIG_CLK_QCOM) += qcom/
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obj-$(CONFIG_CLK_RENESAS) += renesas/
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obj-$(CONFIG_$(PHASE_)CLK_SCMI) += clk_scmi.o
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obj-$(CONFIG_CLK_SIFIVE) += sifive/
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obj-$(CONFIG_CLK_SOPHGO) += sophgo/
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obj-$(CONFIG_CLK_SUNXI) += sunxi/
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obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
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obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
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obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
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obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
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obj-$(CONFIG_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
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obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
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obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
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obj-$(CONFIG_CLK_ICS8N3QV01) += ics8n3qv01.o
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obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
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obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
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obj-$(CONFIG_SANDBOX) += clk_sandbox.o
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obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
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