Simon Glass 8ebca32b2d x86: Set the CPU vendor in SPL ...

We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

2023-09-22 06:03:46 +08:00

..

arc

treewide: unify the linker symbol reference format

2023-08-09 09:21:42 -04:00

arm

zynqmp: config: Add proper dependencies for USB

2023-09-21 13:20:12 +02:00

m68k

arch: m68k: Implement relocation

2023-09-06 13:28:58 +02:00

microblaze

treewide: rework linker symbol declarations in sections header

2023-08-09 09:21:42 -04:00

mips

event: Use an event to replace last_stage_init()

2023-08-31 13:16:55 -04:00

nios2

event: Convert existing spy records to simple

2023-08-31 13:16:54 -04:00

powerpc

Kconfigs: Correct default of "0" on hex type entries

2023-08-09 09:21:42 -04:00

riscv

riscv: dts: starfive: generate u-boot-spl.bin.normal.out

2023-09-20 21:05:16 +08:00

sandbox

dm: core: ofnode: Add ofnode_read_bootscript_flash()

2023-09-21 13:20:11 +02:00

sh

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x86

x86: Set the CPU vendor in SPL

2023-09-22 06:03:46 +08:00

xtensa

treewide: unify the linker symbol reference format

2023-08-09 09:21:42 -04:00

.gitignore

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Kconfig

arch: m68k: Implement relocation

2023-09-06 13:28:58 +02:00

Kconfig.nxp

LFU-544: Kconfig.nxp: Fixed secure boot on LS-CH2 platforms

2023-07-06 13:04:56 +08:00

u-boot-elf.lds

…