u-boot

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Aswath Govindraju 3c1d89ff76 arm: dts: k3-j721e: Add support for PLL_CMNLC clocks in SerDes0

The PLL_CMNLC clocks are modelled as a child clock device of seirra. In the
function device_probe, the corresponding clocks are probed before calling
the device's probe. The PLL_CMNLC mux clock can only be created after the
device's probe. Therefore, move assigned-clocks and assigned-clock-parents
to the link nodes in U-Boot device tree file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>

2022-02-08 11:00:03 -05:00

arc

Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig

2021-12-27 16:20:18 -05:00

arm

arm: dts: k3-j721e: Add support for PLL_CMNLC clocks in SerDes0

2022-02-08 11:00:03 -05:00

m68k

m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro

2022-01-12 14:21:24 -05:00

microblaze

Merge tag 'doc-2022-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi