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28d7d76a86a4e73db27b521d034fb6170df95672
u-boot/arch
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Simon Glass 28d7d76a86 x86: Add an option to control the position of SPL 
For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different
location from where SPL must be placed in ROM. In other words, although
SPL runs before SDRAM is set up, it is not execute-in-place (XIP).

Add a Kconfig option for the ROM position.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:19 +08:00
..
arc
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
arm
dm: gpio: Allow control of GPIO uclass in SPL
2019-12-15 08:52:29 +08:00
m68k
common: Move trap_init() out of common.h
2019-12-02 18:25:25 -05:00
microblaze
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
mips
Merge branch '2019-12-02-master-imports'
2019-12-02 22:05:35 -05:00
nds32
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
nios2
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
powerpc
common: Move some board functions out of common.h
2019-12-02 18:25:21 -05:00
riscv
riscv: add option to wait for ack from secondary harts in smp functions
2019-12-10 08:23:10 +08:00
sandbox
sandbox: Add a test for IRQ
2019-12-15 11:44:12 +08:00
sh
common: Move enable/disable_interrupts out of common.h
2019-12-02 18:25:01 -05:00
x86
x86: Add an option to control the position of SPL
2019-12-15 11:44:19 +08:00
xtensa
common: Move interrupt functions into a new header
2019-12-02 18:25:00 -05:00
.gitignore
…
Kconfig
x86: Don't imply libfdt or SPI flash in TPL
2019-12-15 11:44:15 +08:00