Heinrich Schuchardt 6aabe229f8 riscv: define a cache line size for the generic CPU ...

The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set.

Define the cache line size for QEMU on RISC-V to be 64 bytes.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>

2023-07-24 13:22:24 +08:00

..

cpu.c

common: Drop net.h from common header

2020-05-18 17:33:31 -04:00

dram.c

board_f: Fix types for board_get_usable_ram_top()

2022-09-23 15:12:42 -04:00

Kconfig

riscv: define a cache line size for the generic CPU

2023-07-24 13:22:24 +08:00

Makefile

riscv: Rename cpu/qemu to cpu/generic

2019-02-27 09:12:33 +08:00