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DDR training data can be saved to NVM and be available to OEI at boot time, which will trigger QuickBoot flow. U-Boot only checks for data integrity (CRC32), while OEI is in charge of authentication when it tries to load the data from NVM. On iMX95 A0/A1, 'authentication' is done via another CRC32. On the other SoCs, authentication is done by using ELE to check the MAC stored in the ddrphy_qb_state structure. Supported platforms: iMX94, iMX95, iMX952 (using OEI) Supported storage types: eMMC, SD, SPI flash. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Simona Toaca <simona.toaca@nxp.com>