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4020549f9b
Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
117 lines
2.6 KiB
C
117 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Amlogic Meson Reset Controller driver
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*
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* Copyright (c) 2018 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <dm.h>
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#include <log.h>
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#include <malloc.h>
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#include <reset-uclass.h>
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#include <regmap.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#define BITS_PER_REG 32
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struct meson_reset_drvdata {
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unsigned int reg_count;
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unsigned int level_offset;
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};
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struct meson_reset_priv {
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struct regmap *regmap;
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struct meson_reset_drvdata *drvdata;
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};
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static int meson_reset_request(struct reset_ctl *reset_ctl)
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{
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struct meson_reset_priv *priv = dev_get_priv(reset_ctl->dev);
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struct meson_reset_drvdata *data = priv->drvdata;
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if (reset_ctl->id > (data->reg_count * BITS_PER_REG))
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return -EINVAL;
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return 0;
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}
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static int meson_reset_level(struct reset_ctl *reset_ctl, bool assert)
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{
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struct meson_reset_priv *priv = dev_get_priv(reset_ctl->dev);
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struct meson_reset_drvdata *data = priv->drvdata;
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uint bank = reset_ctl->id / BITS_PER_REG;
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uint offset = reset_ctl->id % BITS_PER_REG;
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uint reg_offset = data->level_offset + (bank << 2);
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uint val;
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regmap_read(priv->regmap, reg_offset, &val);
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if (assert)
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val &= ~BIT(offset);
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else
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val |= BIT(offset);
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regmap_write(priv->regmap, reg_offset, val);
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return 0;
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}
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static int meson_reset_assert(struct reset_ctl *reset_ctl)
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{
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return meson_reset_level(reset_ctl, true);
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}
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static int meson_reset_deassert(struct reset_ctl *reset_ctl)
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{
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return meson_reset_level(reset_ctl, false);
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}
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static const struct reset_ops meson_reset_ops = {
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.request = meson_reset_request,
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.rst_assert = meson_reset_assert,
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.rst_deassert = meson_reset_deassert,
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};
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static const struct meson_reset_drvdata meson_gxbb_data = {
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.reg_count = 8,
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.level_offset = 0x7c,
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};
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static const struct meson_reset_drvdata meson_a1_data = {
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.reg_count = 3,
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.level_offset = 0x40,
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};
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static const struct udevice_id meson_reset_ids[] = {
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{
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.compatible = "amlogic,meson-gxbb-reset",
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.data = (ulong)&meson_gxbb_data,
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},
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{
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.compatible = "amlogic,meson-axg-reset",
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.data = (ulong)&meson_gxbb_data,
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},
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{
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.compatible = "amlogic,meson-a1-reset",
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.data = (ulong)&meson_a1_data,
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},
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{ }
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};
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static int meson_reset_probe(struct udevice *dev)
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{
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struct meson_reset_priv *priv = dev_get_priv(dev);
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priv->drvdata = (struct meson_reset_drvdata *)dev_get_driver_data(dev);
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return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
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}
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U_BOOT_DRIVER(meson_reset) = {
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.name = "meson_reset",
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.id = UCLASS_RESET,
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.of_match = meson_reset_ids,
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.probe = meson_reset_probe,
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.ops = &meson_reset_ops,
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.priv_auto = sizeof(struct meson_reset_priv),
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};
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