Patrick Delaunay 67f9f11f19 stm32mp: limit size of cacheable DDR in pre-reloc stage ...

In pre-reloc stage, U-Boot marks cacheable the DDR limited by
the new config CONFIG_DDR_CACHEABLE_SIZE.

This patch allows to avoid any speculative access to DDR protected by
firewall and used by OP-TEE; the "no-map" reserved memory
node in DT are assumed after this limit:
STM32_DDR_BASE + DDR_CACHEABLE_SIZE.

Without security, in basic boot, the value is equal to STM32_DDR_SIZE.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>

2020-10-21 18:12:20 +02:00

..

arc

board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo

2020-08-06 14:26:35 -04:00

arm

stm32mp: limit size of cacheable DDR in pre-reloc stage

2020-10-21 18:12:20 +02:00

m68k

board_f: m68k: Factor out m68k-specific bdinfo setup

2020-08-06 14:26:35 -04:00

microblaze

microblaze: Add support for little/big endian in/out api's

2020-09-23 10:31:40 +02:00

mips

mips: octeon: Add bootoctlinux command

2020-10-07 20:25:58 +02:00

nds32

treewide: convert bd_t to struct bd_info by coccinelle

2020-07-17 09:30:13 -04:00

nios2

cpu: Convert the methods to use a const udevice *

2020-07-25 14:46:57 -06:00

powerpc

board/freescale: Remove P5020DS board support

2020-09-24 08:27:44 -04:00

riscv

riscv: add DT binding for BOOT button on Maix board

2020-10-08 11:42:36 -04:00

sandbox

test: sharpen button label unit test

2020-10-14 11:16:34 -04:00

sh

sh: r2dplus: Add SCIF1 to the basic DT

2020-08-02 19:58:27 +02:00

x86

bloblist: Allow custom alignment for blobs

2020-10-06 09:07:54 -06:00

xtensa

xtensa: Remove arch_setup_bdinfo()

2020-08-26 09:19:40 +02:00

.gitignore

…

Kconfig

arc: Kconfig: Add missing DM dependency

2020-08-27 11:26:58 -04:00

u-boot-elf.lds

arch: Add explicit linker script for u-boot-elf

2020-04-03 11:52:55 -04:00