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The clock initialization routine sets the DISP* clock parent to PLLC, resulting in DC failure in the case when PLLD was previously configured. This issue disrupts chainloading and to prevent failures caused by DISP* clock parent conflicts, clock initialization should not modify DISP*. The DC driver handles DISP* configuration. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>