Files
u-boot/include/smbios_def.h
Raymond Mao 83b28b55d7 smbios: add support for dynamic generation of Type 9 system slot tables
This commit introduces support for generating SMBIOS Type 9 (System Slot)
tables using a hybrid approach:

1. Explicit Device Tree definitions:
   Child node under '/smbios/smbios/system-slot' will be interpreted as
   individual slot definitions.
   - Each child represents a slot (e.g., isa, pcmcia, etc.).
   - Properties follow the SMBIOS specification using lowercase
     hyphen-separated names such as 'slot-type', 'slot-id',
     'segment-group-number', 'bus-number', 'slot-information', etc.
   - This approach allows full customization of each system slot and is
     especially suitable for platforms with well-defined slot topology.

2. Automatic detection fallback:
   If child node under '/smbios/smbios/system-slot' does not exist, the
   implementation will scan the entire device tree for nodes whose
   'device_type' matches known slot-related types ("pci", "isa", "pcmcia",
   etc.).
   - When a match is found, default values or heuristics are applied to
     populate to the System Slot table.
   - This mode is useful for platforms that lack explicit SMBIOS nodes
     but still expose slot topology via standard DT conventions.

Together, two approaches ensure that SMBIOS Type 9 entries are available
whether explicitly described or automatically derived.

Signed-off-by: Raymond Mao <raymondmaoca@gmail.com>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-02-18 08:27:51 -06:00

284 lines
9.7 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2024 Linaro Limited
* Author: Raymond Mao <raymond.mao@linaro.org>
*/
#ifndef _SMBIOS_DEF_H_
#define _SMBIOS_DEF_H_
/*
* BIOS characteristics
*/
#define BIOS_CHARACTERISTICS_PCI_SUPPORTED 0x80 /* BIT(7) */
#define BIOS_CHARACTERISTICS_UPGRADEABLE 0x800 /* BIT(11) */
#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT 0x10000 /* BIT(16) */
#define BIOS_CHARACTERISTICS_EXT1_ACPI 1 /* BIT(0) */
#define BIOS_CHARACTERISTICS_EXT2_UEFI 8 /* BIT(3) */
#define BIOS_CHARACTERISTICS_EXT2_TARGET 4 /* BIT(2) */
/*
* System Information
*/
#define SMBIOS_WAKEUP_TYPE_RESERVED 0
#define SMBIOS_WAKEUP_TYPE_OTHER 1
#define SMBIOS_WAKEUP_TYPE_UNKNOWN 2
#define SMBIOS_WAKEUP_TYPE_APM_TIMER 3
#define SMBIOS_WAKEUP_TYPE_MODEM_RING 4
#define SMBIOS_WAKEUP_TYPE_LAN_REMOTE 5
#define SMBIOS_WAKEUP_TYPE_POWER_SWITCH 6
#define SMBIOS_WAKEUP_TYPE_PCI_PME 7
#define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED 8
/*
* Baseboard Information
*/
#define SMBIOS_BOARD_FEAT_HOST_BOARD 1 /* BIT(0) */
#define SMBIOS_BOARD_FEAT_REQ_AUX 2 /* BIT(1) */
#define SMBIOS_BOARD_FEAT_REMOVABLE 4 /* BIT(2) */
#define SMBIOS_BOARD_FEAT_REPLACEABLE 8 /* BIT(3) */
#define SMBIOS_BOARD_FEAT_HOT_SWAPPABLE 16 /* BIT(4) */
#define SMBIOS_BOARD_TYPE_UNKNOWN 1
#define SMBIOS_BOARD_TYPE_OTHER 2
#define SMBIOS_BOARD_TYPE_SERVER_BLADE 3
#define SMBIOS_BOARD_TYPE_CON_SWITCH 4
#define SMBIOS_BOARD_TYPE_SM_MODULE 5
#define SMBIOS_BOARD_TYPE_PROCESSOR_MODULE 6
#define SMBIOS_BOARD_TYPE_IO_MODULE 7
#define SMBIOS_BOARD_TYPE_MEM_MODULE 8
#define SMBIOS_BOARD_TYPE_DAUGHTER_BOARD 9
#define SMBIOS_BOARD_TYPE_MOTHERBOARD 10
#define SMBIOS_BOARD_TYPE_PROC_MEM_MODULE 11
#define SMBIOS_BOARD_TYPE_PROC_IO_MODULE 12
#define SMBIOS_BOARD_TYPE_INTERCON 13
/*
* System Enclosure or Chassis
*/
#define SMBIOS_ENCLOSURE_UNKNOWN 2
#define SMBIOS_ENCLOSURE_DESKTOP 3
#define SMBIOS_STATE_OTHER 1
#define SMBIOS_STATE_UNKNOWN 2
#define SMBIOS_STATE_SAFE 3
#define SMBIOS_STATE_WARNING 4
#define SMBIOS_STATE_CRITICAL 5
#define SMBIOS_STATE_NONRECOVERABLE 6
#define SMBIOS_SECURITY_OTHER 1
#define SMBIOS_SECURITY_UNKNOWN 2
#define SMBIOS_SECURITY_NONE 3
#define SMBIOS_SECURITY_EXTINT_LOCK 4
#define SMBIOS_SECURITY_EXTINT_EN 5
#define SMBIOS_ENCLOSURE_OEM_UND 0
#define SMBIOS_ENCLOSURE_HEIGHT_UND 0
#define SMBIOS_POWCORD_NUM_UND 0
#define SMBIOS_ELEMENT_TYPE_SELECT 0x80 /* BIT(7) */
/*
* Processor Information
*/
#define SMBIOS_PROCESSOR_TYPE_OTHER 1
#define SMBIOS_PROCESSOR_TYPE_UNKNOWN 2
#define SMBIOS_PROCESSOR_TYPE_CENTRAL 3
#define SMBIOS_PROCESSOR_TYPE_MATH 4
#define SMBIOS_PROCESSOR_TYPE_DSP 5
#define SMBIOS_PROCESSOR_TYPE_VIDEO 6
#define SMBIOS_PROCESSOR_STATUS_UNKNOWN 0
#define SMBIOS_PROCESSOR_STATUS_ENABLED 1
#define SMBIOS_PROCESSOR_STATUS_DISABLED_USER 2
#define SMBIOS_PROCESSOR_STATUS_DISABLED_BIOS 3
#define SMBIOS_PROCESSOR_STATUS_IDLE 4
#define SMBIOS_PROCESSOR_STATUS_OTHER 7
#define SMBIOS_PROCESSOR_UPGRADE_OTHER 1
#define SMBIOS_PROCESSOR_UPGRADE_UNKNOWN 2
#define SMBIOS_PROCESSOR_UPGRADE_NONE 6
#define SMBIOS_PROCESSOR_FAMILY_OTHER 1
#define SMBIOS_PROCESSOR_FAMILY_UNKNOWN 2
#define SMBIOS_PROCESSOR_FAMILY_RSVD 255
#define SMBIOS_PROCESSOR_FAMILY_ARMV7 256
#define SMBIOS_PROCESSOR_FAMILY_ARMV8 257
#define SMBIOS_PROCESSOR_FAMILY_RV32 512
#define SMBIOS_PROCESSOR_FAMILY_RV64 513
#define SMBIOS_PROCESSOR_FAMILY_EXT 0xfe
/* Processor Characteristics */
#define SMBIOS_PROCESSOR_RSVD 1 /* BIT(0) */
#define SMBIOS_PROCESSOR_UND 2 /* BIT(1) */
#define SMBIOS_PROCESSOR_64BIT 4 /* BIT(2) */
#define SMBIOS_PROCESSOR_MULTICORE 8 /* BIT(3) */
#define SMBIOS_PROCESSOR_HWTHREAD 16 /* BIT(4) */
#define SMBIOS_PROCESSOR_EXEC_PROT 32 /* BIT(5) */
#define SMBIOS_PROCESSOR_ENH_VIRT 64 /* BIT(6) */
#define SMBIOS_PROCESSOR_POW_CON 0x80 /* BIT(7) */
#define SMBIOS_PROCESSOR_128BIT 0x100 /* BIT(8) */
#define SMBIOS_PROCESSOR_ARM64_SOCID 0x200 /* BIT(9) */
/*
* Cache Information
*/
#define SMBIOS_CACHE_SIZE_EXT_KB (2047 * 1024) /* 2047 MiB */
#define SMBIOS_CACHE_HANDLE_NONE 0xffff
/* System Cache Type */
#define SMBIOS_CACHE_SYSCACHE_TYPE_OTHER 1
#define SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN 2
#define SMBIOS_CACHE_SYSCACHE_TYPE_INST 3
#define SMBIOS_CACHE_SYSCACHE_TYPE_DATA 4
#define SMBIOS_CACHE_SYSCACHE_TYPE_UNIFIED 5
/* Cache Speed */
#define SMBIOS_CACHE_SPEED_UNKNOWN 0
/* SRAM Type */
#define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN 2 /* BIT(1) */
/* Error Correction Type */
#define SMBIOS_CACHE_ERRCORR_OTHER 1
#define SMBIOS_CACHE_ERRCORR_UNKNOWN 2
#define SMBIOS_CACHE_ERRCORR_NONE 3
#define SMBIOS_CACHE_ERRCORR_PARITY 4
#define SMBIOS_CACHE_ERRCORR_SBITECC 5
#define SMBIOS_CACHE_ERRCORR_MBITECC 6
/* Cache Configuration */
#define SMBIOS_CACHE_LEVEL_1 0
#define SMBIOS_CACHE_LEVEL_2 1
#define SMBIOS_CACHE_LEVEL_3 2
#define SMBIOS_CACHE_LEVEL_4 3
#define SMBIOS_CACHE_LEVEL_5 4
#define SMBIOS_CACHE_LEVEL_6 5
#define SMBIOS_CACHE_LEVEL_7 6
#define SMBIOS_CACHE_LEVEL_8 7
#define SMBIOS_CACHE_SOCKETED 8 /* BIT(3) */
#define SMBIOS_CACHE_LOCATE_EXTERNAL 32 /* BIT(5) */
#define SMBIOS_CACHE_LOCATE_RESERVED 64 /* BIT(6) */
#define SMBIOS_CACHE_LOCATE_UNKNOWN 96 /* (BIT(5) | BIT(6)) */
#define SMBIOS_CACHE_ENABLED 0x80 /* BIT(7) */
#define SMBIOS_CACHE_OP_WB 0x100 /* BIT(8), Write Back */
#define SMBIOS_CACHE_OP_VAR 0x200 /* BIT(9), Varies with Memory Address */
#define SMBIOS_CACHE_OP_UND 0x300 /* (BIT(8) | BIT(9)), Unknown*/
/* Cache Granularity */
#define SMBIOS_CACHE_GRANU_1K 0
#define SMBIOS_CACHE_GRANU_64K 1
/* Cache Associativity */
#define SMBIOS_CACHE_ASSOC_OTHER 1
#define SMBIOS_CACHE_ASSOC_UNKNOWN 2
#define SMBIOS_CACHE_ASSOC_DMAPPED 3
#define SMBIOS_CACHE_ASSOC_2WAY 4
#define SMBIOS_CACHE_ASSOC_4WAY 5
#define SMBIOS_CACHE_ASSOC_FULLY 6
#define SMBIOS_CACHE_ASSOC_8WAY 7
#define SMBIOS_CACHE_ASSOC_16WAY 8
#define SMBIOS_CACHE_ASSOC_12WAY 9
#define SMBIOS_CACHE_ASSOC_24WAY 10
#define SMBIOS_CACHE_ASSOC_32WAY 11
#define SMBIOS_CACHE_ASSOC_48WAY 12
#define SMBIOS_CACHE_ASSOC_64WAY 13
#define SMBIOS_CACHE_ASSOC_20WAY 14
/*
* System Slot
*/
/* Slot Type */
#define SMBIOS_SYSSLOT_TYPE_OTHER 1
#define SMBIOS_SYSSLOT_TYPE_UNKNOWN 2
#define SMBIOS_SYSSLOT_TYPE_ISA 3 /* ISA */
#define SMBIOS_SYSSLOT_TYPE_PCI 6 /* PCI */
#define SMBIOS_SYSSLOT_TYPE_PCMCIA 7 /* PCMCIA */
#define SMBIOS_SYSSLOT_TYPE_PCIE 0xa5 /* PCI Express */
#define SMBIOS_SYSSLOT_TYPE_PCIEX1 0xa6 /* PCI Express x1 */
#define SMBIOS_SYSSLOT_TYPE_PCIEX2 0xa7 /* PCI Express x2 */
#define SMBIOS_SYSSLOT_TYPE_PCIEX4 0xa8 /* PCI Express x4 */
#define SMBIOS_SYSSLOT_TYPE_PCIEX8 0xa9 /* PCI Express x8 */
#define SMBIOS_SYSSLOT_TYPE_PCIEX16 0xaa /* PCI Express x16 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2 0xab /* PCI Express Gen 2 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X1 0xac /* PCI Express Gen 2 x1 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X2 0xad /* PCI Express Gen 2 x2 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X4 0xae /* PCI Express Gen 2 x4 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X8 0xaf /* PCI Express Gen 2 x8 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X16 0xb0 /* PCI Express Gen 2 x16 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3 0xb1 /* PCI Express Gen 3 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X1 0xb2 /* PCI Express Gen 3 x1 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X2 0xb3 /* PCI Express Gen 3 x2 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X4 0xb4 /* PCI Express Gen 3 x4 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X8 0xb5 /* PCI Express Gen 3 x8 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X16 0xb6 /* PCI Express Gen 3 x16 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4 0xb8 /* PCI Express Gen 4 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X1 0xb9 /* PCI Express Gen 4 x1 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X2 0xba /* PCI Express Gen 4 x2 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X4 0xbb /* PCI Express Gen 4 x4 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X8 0xbc /* PCI Express Gen 4 x8 */
#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X16 0xbd /* PCI Express Gen 4 x16 */
/* Slot Data Bus Width */
#define SMBIOS_SYSSLOT_WIDTH_OTHER 1
#define SMBIOS_SYSSLOT_WIDTH_UNKNOWN 2
#define SMBIOS_SYSSLOT_WIDTH_8BIT 3
#define SMBIOS_SYSSLOT_WIDTH_16BIT 4
#define SMBIOS_SYSSLOT_WIDTH_32BIT 5
#define SMBIOS_SYSSLOT_WIDTH_64BIT 6
#define SMBIOS_SYSSLOT_WIDTH_128BIT 7
#define SMBIOS_SYSSLOT_WIDTH_1X 8
#define SMBIOS_SYSSLOT_WIDTH_2X 9
#define SMBIOS_SYSSLOT_WIDTH_4X 10
#define SMBIOS_SYSSLOT_WIDTH_8X 11
#define SMBIOS_SYSSLOT_WIDTH_12X 12
#define SMBIOS_SYSSLOT_WIDTH_16X 13
#define SMBIOS_SYSSLOT_WIDTH_32X 14
/* Current Usage */
#define SMBIOS_SYSSLOT_USAGE_OTHER 1
#define SMBIOS_SYSSLOT_USAGE_UNKNOWN 2
#define SMBIOS_SYSSLOT_USAGE_AVAILABLE 3
#define SMBIOS_SYSSLOT_USAGE_INUSE 4
#define SMBIOS_SYSSLOT_USAGE_NA 5
/* Slot Length */
#define SMBIOS_SYSSLOT_LENG_OTHER 1
#define SMBIOS_SYSSLOT_LENG_UNKNOWN 2
#define SMBIOS_SYSSLOT_LENG_SHORT 3
#define SMBIOS_SYSSLOT_LENG_LONG 4
#define SMBIOS_SYSSLOT_LENG_2_5INDRV 5
#define SMBIOS_SYSSLOT_LENG_3_5INDRV 6
/* Slot Characteristics 1 */
#define SMBIOS_SYSSLOT_CHAR_UND 1 /* BIT(0) */
#define SMBIOS_SYSSLOT_CHAR_5V 2 /* BIT(1) */
#define SMBIOS_SYSSLOT_CHAR_3_3V 4 /* BIT(2) */
#define SMBIOS_SYSSLOT_CHAR_SHARED 8 /* BIT(3) */
#define SMBIOS_SYSSLOT_CHAR_PCCARD16 16 /* BIT(4) */
#define SMBIOS_SYSSLOT_CHAR_PCCARDBUS 32 /* BIT(5) */
#define SMBIOS_SYSSLOT_CHAR_PCCARDZV 64 /* BIT(6) */
#define SMBIOS_SYSSLOT_CHAR_PCCARDMRR 0x80 /* BIT(7) */
/* Slot Characteristics 2 */
#define SMBIOS_SYSSLOT_CHAR_PCIPME 1 /* BIT(0) */
#define SMBIOS_SYSSLOT_CHAR_HOTPLUG 2 /* BIT(1) */
#define SMBIOS_SYSSLOT_CHAR_PCISMB 4 /* BIT(2) */
#define SMBIOS_SYSSLOT_CHAR_PCIBIF 8 /* BIT(3) */
#define SMBIOS_SYSSLOT_CHAR_ASYNCRM 16 /* BIT(4) */
#define SMBIOS_SYSSLOT_CHAR_FBCXL1 32 /* BIT(5) */
#define SMBIOS_SYSSLOT_CHAR_FBCXL2 64 /* BIT(6) */
#define SMBIOS_SYSSLOT_CHAR_FBCXL3 0x80 /* BIT(7) */
/* Slot segment group number */
#define SMBIOS_SYSSLOT_SGGNUM_UND 0
#endif /* _SMBIOS_DEF_H_ */