Pratyush Yadav 95954f55e9 mtd: spi-nor-core: Add support for DTR protocol ...

Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.

Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All phases need to be either DTR or STR.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

2021-06-28 12:00:32 +05:30

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bbm.h

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cfi.h

mtd: spi: Port SPI NOR framework from Linux

2019-02-07 15:33:21 +05:30

concat.h

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doc2000.h

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flashchip.h

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fsl_upm.h

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fsmc_nand.h

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mtd.h

mtd: add support for parsing partitions defined in OF

2021-06-24 11:53:15 +05:30

nand_bch.h

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nand_ecc.h

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nand.h

spi: Tidy up get/set of device node

2021-01-05 12:24:41 -07:00

ndfc.h

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omap_elm.h

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omap_gpmc.h

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onenand_regs.h

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onenand.h

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partitions.h

mtd: mtdpart: implement proper partition handling

2018-10-02 22:12:32 +05:30

rawnand.h

arm: Don't include common.h in header files

2020-05-18 14:54:24 -04:00

samsung_onenand.h

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spi-nor.h

mtd: spi-nor-core: Add support for DTR protocol

2021-06-28 12:00:32 +05:30

spinand.h

spi: Tidy up get/set of device node

2021-01-05 12:24:41 -07:00

st_smi.h

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ubi.h

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