Michael Bode b7b301c906 board: bsh: imx6ulz_smm_m2: Add delay between DRAM read access ...

A small delay between DRAM read access with wrong parameters and
reconfiguration is necessary.
Without a delay between DRAM read access and a following reconfiguration
this reconfiguration fails for certain DRAM chips (Nanya).

Signed-off-by: Michael Bode <michael.bode@bshg.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

2025-05-21 07:53:13 -03:00

..

imx6ulz_smm_m2

board: bsh: imx6ulz_smm_m2: Add delay between DRAM read access

2025-05-21 07:53:13 -03:00

imx8mn_smm_s2

board: bsh: imx8mn_bsh_smm_s2/s2pro: let clock system enable UART clock

2025-05-21 07:52:29 -03:00