Torsten Duwe 6164d86984 riscv: jh7110: enable riscv,timer in the device tree ...

The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
Note that in the device tree.

Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

2023-09-05 10:53:36 +08:00

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arc

global: Use proper project name U-Boot

2023-06-12 13:24:31 +02:00

arm

nokia_rx51: Remove platform

2023-09-04 21:14:32 -04:00

m68k

m68k: dts: add watchdog node

2023-07-25 23:21:42 +02:00

microblaze

arm64: zynqmp: Switch to amd.com emails

2023-07-21 09:00:38 +02:00

mips

common: return type board_get_usable_ram_top

2023-08-15 18:21:17 +02:00

nios2

dm: Emit the arch_cpu_init_dm() even only before relocation

2023-05-11 10:25:29 +08:00

powerpc

Merge tag 'fsl-qoriq-2023-7-13' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

2023-07-19 07:59:34 -04:00

riscv

riscv: jh7110: enable riscv,timer in the device tree

2023-09-05 10:53:36 +08:00

sandbox

arm_ffa: introduce sandbox FF-A support

2023-08-08 10:22:03 -04:00

sh

sh: use asm-generic/unaligned.h

2023-05-31 14:05:34 -04:00

x86

common: return type board_get_usable_ram_top

2023-08-15 18:21:17 +02:00

xtensa

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.gitignore

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Kconfig

acpi: Create a new Kconfig for ACPI

2023-05-11 10:25:29 +08:00

Kconfig.nxp

LFU-544: Kconfig.nxp: Fixed secure boot on LS-CH2 platforms

2023-07-06 13:04:56 +08:00

u-boot-elf.lds

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