Svyatoslav Ryhel aa291c5f8b video: tegra: parametrize PCLK and DE polarity ...

Configure pixel clock and data enable polarity according to panel flags.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>

2025-08-01 08:44:28 +03:00

..

tegra124

video: move tegra124 into common tegra dir

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cpu-bridge.c

video: tegra: add 8-bit CPU driven protocol

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dc-pwm-backlight.c

video: tegra: drop prefix from file names

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dc.c

video: tegra: parametrize PCLK and DE polarity

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dc.h

video: tegra: drop prefix from file names

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dsi.c

video: tegra: drop prefix from file names

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dsi.h

video: tegra: drop prefix from file names

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hdmi.c

video: tegra: drop prefix from file names

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hdmi.h

video: tegra: drop prefix from file names

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host1x.c

video: tegra: drop prefix from file names

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Kconfig

video: tegra: add 8-bit CPU driven protocol

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Makefile

video: tegra: add 8-bit CPU driven protocol

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mipi-phy.c

video: rename tegra20 to tegra

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mipi-phy.h

video: rename tegra20 to tegra

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mipi.c

video: tegra: drop prefix from file names

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TODO

video: move tegra124 into common tegra dir

2025-04-12 09:43:47 +03:00