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Rework existing DC driver configuration to support bridges (both external and internal DSI and HDMI controllers) and align video devices chain logic with Linux implementation. Additionally, this should improve communication between DC and internal DSI/HDMI controllers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010
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* NVIDIA Corporation <www.nvidia.com>
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*/
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#ifndef _TEGRA_DC_H
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#define _TEGRA_DC_H
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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/* arch-tegra/dc exists only because T124 uses it */
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#include <asm/arch-tegra/dc.h>
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struct tegra_dc_plat {
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struct udevice *dev; /* Display controller device */
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struct dc_ctlr *dc; /* Display controller regmap */
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int pipe; /* DC number: 0 for A, 1 for B */
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ulong scdiv; /* Shift clock divider */
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};
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/* This holds information about a window which can be displayed */
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struct disp_ctl_win {
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enum win_color_depth_id fmt; /* Color depth/format */
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unsigned int bpp; /* Bits per pixel */
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phys_addr_t phys_addr; /* Physical address in memory */
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unsigned int x; /* Horizontal address offset (bytes) */
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unsigned int y; /* Veritical address offset (bytes) */
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unsigned int w; /* Width of source window */
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unsigned int h; /* Height of source window */
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unsigned int stride; /* Number of bytes per line */
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unsigned int out_x; /* Left edge of output window (col) */
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unsigned int out_y; /* Top edge of output window (row) */
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unsigned int out_w; /* Width of output window in pixels */
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unsigned int out_h; /* Height of output window in pixels */
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};
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#endif /* _TEGRA_DC_H */
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