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Reformat spacing/comments in src/updi_nvm_v4.c

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This commit is contained in:
Stefan Rueger
2024-08-18 01:54:31 +01:00
parent 5014fcd9b2
commit 19494c199d
1 changed files with 56 additions and 49 deletions
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105
src/updi_nvm_v4.c
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@@ -71,8 +71,7 @@
#define USE_DEFAULT_COMMAND 0xFF
typedef enum
{
typedef enum {
DONT_USE_WORD_ACCESS,
USE_WORD_ACCESS
} access_mode;
@@ -104,22 +103,23 @@ int updi_nvm_chip_erase_V4(const PROGRAMMER *pgm, const AVRPART *p) {
raise PymcuprogSerialUpdiNvmTimeout("Timeout waiting for NVM controller to be ready after chip erase")
*/
int status;
pmsg_debug("chip erase using NVM CTRL\n");
if (updi_nvm_wait_ready_V4(pgm, p) < 0) {
if(updi_nvm_wait_ready_V4(pgm, p) < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_CHIP_ERASE) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_CHIP_ERASE) < 0) {
pmsg_error("chip erase command failed\n");
return -1;
}
status = updi_nvm_wait_ready_V4(pgm, p);
status = updi_nvm_wait_ready_V4(pgm, p);
pmsg_debug("clear NVM command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
pmsg_error("command buffer erase failed\n");
return -1;
}
if (status < 0) {
if(status < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
@@ -158,27 +158,28 @@ int updi_nvm_erase_flash_page_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32
*/
unsigned char data[1];
int status;
pmsg_debug("erase flash page at address 0x%08X\n", address);
if (updi_nvm_wait_ready_V4(pgm, p) < 0) {
if(updi_nvm_wait_ready_V4(pgm, p) < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_FLASH_PAGE_ERASE) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_FLASH_PAGE_ERASE) < 0) {
pmsg_error("flash page erase command failed\n");
return -1;
}
data[0] = 0xFF;
if (updi_write_data(pgm, address, data, 1) < 0) {
if(updi_write_data(pgm, address, data, 1) < 0) {
pmsg_error("dummy write operation failed\n");
return -1;
}
status = updi_nvm_wait_ready_V4(pgm, p);
status = updi_nvm_wait_ready_V4(pgm, p);
pmsg_debug("clear NVM command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
pmsg_error("command buffer erase failed\n");
return -1;
}
if (status < 0) {
if(status < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
@@ -210,22 +211,23 @@ int updi_nvm_erase_eeprom_V4(const PROGRAMMER *pgm, const AVRPART *p) {
raise PymcuprogSerialUpdiNvmTimeout("Timeout waiting for NVM controller to be ready after EEPROM erase")
*/
int status;
pmsg_debug("erase EEPROM\n");
if (updi_nvm_wait_ready_V4(pgm, p) < 0) {
if(updi_nvm_wait_ready_V4(pgm, p) < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_EEPROM_ERASE) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_EEPROM_ERASE) < 0) {
pmsg_error("EEPROM erase command failed\n");
return -1;
}
status = updi_nvm_wait_ready_V4(pgm, p);
status = updi_nvm_wait_ready_V4(pgm, p);
pmsg_debug("clear NVM command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
pmsg_error("command buffer erase failed\n");
return -1;
}
if (status < 0) {
if(status < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
@@ -249,10 +251,11 @@ int updi_nvm_erase_user_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t
return updi_nvm_erase_flash_page_V4(pgm, p, address);
}
static int nvm_write_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer,
uint16_t size, access_mode mode);
static int nvm_write_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address,
unsigned char *buffer, uint16_t size, access_mode mode);
int updi_nvm_write_flash_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer, uint16_t size) {
int updi_nvm_write_flash_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address,
unsigned char *buffer, uint16_t size) {
/*
def write_flash(self, address, data):
"""
@@ -266,7 +269,8 @@ int updi_nvm_write_flash_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t ad
return nvm_write_V4(pgm, p, address, buffer, size, USE_WORD_ACCESS);
}
int updi_nvm_write_user_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer, uint16_t size) {
int updi_nvm_write_user_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address,
unsigned char *buffer, uint16_t size) {
/*
def write_user_row(self, address, data):
"""
@@ -281,14 +285,15 @@ int updi_nvm_write_user_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t
return nvm_write_V4(pgm, p, address, buffer, size, DONT_USE_WORD_ACCESS);
}
int updi_nvm_write_boot_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer, uint16_t size) {
/*
Write it as a regular flash page
*/
int updi_nvm_write_boot_row_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address,
unsigned char *buffer, uint16_t size) {
// Write it as a regular flash page
return nvm_write_V4(pgm, p, address, buffer, size, USE_WORD_ACCESS);
}
int updi_nvm_write_eeprom_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer, uint16_t size) {
int updi_nvm_write_eeprom_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address,
unsigned char *buffer, uint16_t size) {
/*
def write_eeprom(self, address, data):
"""
@@ -322,26 +327,27 @@ int updi_nvm_write_eeprom_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t a
raise PymcuprogSerialUpdiNvmTimeout("Timeout waiting for NVM ready after data write")
*/
int status;
if (updi_nvm_wait_ready_V4(pgm, p) < 0) {
if(updi_nvm_wait_ready_V4(pgm, p) < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
pmsg_debug("NVM EEPROM erase/write command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_EEPROM_ERASE_WRITE) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_EEPROM_ERASE_WRITE) < 0) {
pmsg_error("EEPROM erase command failed\n");
return -1;
}
if (updi_write_data(pgm, address, buffer, size) < 0) {
if(updi_write_data(pgm, address, buffer, size) < 0) {
pmsg_error("write data operation failed\n");
return -1;
}
status = updi_nvm_wait_ready_V4(pgm, p);
status = updi_nvm_wait_ready_V4(pgm, p);
pmsg_debug("clear NVM command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
pmsg_error("command buffer erase failed\n");
return -1;
}
if (status < 0) {
if(status < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
@@ -361,13 +367,13 @@ int updi_nvm_write_fuse_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t add
return self.write_eeprom(address, data)
*/
unsigned char buffer[1];
buffer[0]=value;
buffer[0] = value;
return updi_nvm_write_eeprom_V4(pgm, p, address, buffer, 1);
}
static int nvm_write_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t address, unsigned char *buffer,
uint16_t size, access_mode mode)
{
uint16_t size, access_mode mode) {
/*
def write_nvm(self, address, data, use_word_access=True):
"""
@@ -410,33 +416,34 @@ static int nvm_write_V4(const PROGRAMMER *pgm, const AVRPART *p, uint32_t addres
raise PymcuprogSerialUpdiNvmTimeout("Timeout waiting for NVM controller to be ready after data write")
*/
int status;
if (updi_nvm_wait_ready_V4(pgm, p) < 0) {
if(updi_nvm_wait_ready_V4(pgm, p) < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
pmsg_debug("NVM write command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_FLASH_WRITE) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_FLASH_WRITE) < 0) {
pmsg_error("clear page operation failed\n");
return -1;
}
if (mode == USE_WORD_ACCESS) {
if (updi_write_data_words(pgm, address, buffer, size) < 0) {
if(mode == USE_WORD_ACCESS) {
if(updi_write_data_words(pgm, address, buffer, size) < 0) {
pmsg_error("write data words operation failed\n");
return -1;
}
} else {
if (updi_write_data(pgm, address, buffer, size) < 0) {
if(updi_write_data(pgm, address, buffer, size) < 0) {
pmsg_error("write data operation failed\n");
return -1;
}
}
status = updi_nvm_wait_ready_V4(pgm, p);
status = updi_nvm_wait_ready_V4(pgm, p);
pmsg_debug("clear NVM command\n");
if (updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
if(updi_nvm_command_V4(pgm, p, UPDI_V4_NVMCTRL_CTRLA_NOCMD) < 0) {
pmsg_error("command buffer erase failed\n");
return -1;
}
if (status < 0) {
if(status < 0) {
pmsg_error("updi_nvm_wait_ready_V4() failed\n");
return -1;
}
@@ -473,20 +480,20 @@ int updi_nvm_wait_ready_V4(const PROGRAMMER *pgm, const AVRPART *p) {
unsigned long start_time;
unsigned long current_time;
uint8_t status;
start_time = avr_ustimestamp();
do {
if (updi_read_byte(pgm, p->nvm_base + UPDI_V4_NVMCTRL_STATUS, &status) >= 0) {
if (status & UPDI_V4_NVM_STATUS_WRITE_ERROR_MASK) {
if(updi_read_byte(pgm, p->nvm_base + UPDI_V4_NVMCTRL_STATUS, &status) >= 0) {
if(status & UPDI_V4_NVM_STATUS_WRITE_ERROR_MASK) {
pmsg_error("unable to write NVM status, error %d\n", status >> UPDI_V4_NVM_STATUS_WRITE_ERROR_BIT);
return -1;
}
if (!(status & ((1 << UPDI_V4_NVM_STATUS_EEPROM_BUSY_BIT) |
(1 << UPDI_V4_NVM_STATUS_FLASH_BUSY_BIT)))) {
if(!(status & ((1 << UPDI_V4_NVM_STATUS_EEPROM_BUSY_BIT) | (1 << UPDI_V4_NVM_STATUS_FLASH_BUSY_BIT)))) {
return 0;
}
}
current_time = avr_ustimestamp();
} while ((current_time - start_time) < 10000000);
} while((current_time - start_time) < 10000000);
pmsg_error("wait NVM ready timed out\n");
return -1;