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Merge pull request #1887 from stefanrueger/jtag3_pdi

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Fix addresses for jtag3_pdi boot and apptable
This commit is contained in:
Stefan Rueger
2024-08-14 18:05:43 +01:00
committed by GitHub
parent 90ecd9d8e9 96023bb32d
commit 2b7c9de71c
5 changed files with 51 additions and 57 deletions
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67
src/jtag3.c
View File

@@ -168,7 +168,7 @@ void jtag3_print_parms1(const PROGRAMMER *pgm, const char *p, FILE *fp);
static int jtag3_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m,
unsigned int page_size,
unsigned int addr, unsigned int n_bytes);
static unsigned char jtag3_mtype(const PROGRAMMER *pgm, const AVRPART *p, unsigned long addr);
static unsigned char jtag3_mtype(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, unsigned long addr);
static unsigned int jtag3_memaddr(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, unsigned long addr);
@@ -1459,7 +1459,7 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
return 0;
}
@@ -1899,7 +1899,8 @@ void jtag3_close(PROGRAMMER * pgm) {
}
static int jtag3_page_erase(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m,
unsigned int addr) {
unsigned int addr) {
unsigned char cmd[8], *resp;
pmsg_notice2("jtag3_page_erase(.., %s, 0x%x)\n", m->desc, addr);
@@ -1917,12 +1918,12 @@ static int jtag3_page_erase(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
cmd[2] = 0;
if (mem_is_in_flash(m)) {
if (p->prog_modes & PM_UPDI || jtag3_mtype(pgm, p, addr) == MTYPE_FLASH)
cmd[3] = XMEGA_ERASE_APP_PAGE;
else
cmd[3] = XMEGA_ERASE_BOOT_PAGE;
cmd[3] = is_updi(p) || jtag3_mtype(pgm, p, m, addr) == MTYPE_FLASH?
XMEGA_ERASE_APP_PAGE: XMEGA_ERASE_BOOT_PAGE;
PDATA(pgm)->flash_pageaddr = ~0UL;
} else if (mem_is_eeprom(m)) {
cmd[3] = XMEGA_ERASE_EEPROM_PAGE;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_userrow(m)) {
cmd[3] = XMEGA_ERASE_USERSIG;
} else if (mem_is_bootrow(m)) {
@@ -1933,13 +1934,8 @@ static int jtag3_page_erase(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
cmd[3] = XMEGA_ERASE_APP_PAGE;
}
unsigned int addr_adj = addr;
if(p->prog_modes & PM_PDI)
addr_adj += m->offset;
else // PM_UPDI
addr_adj = jtag3_memaddr(pgm, p, m, addr);
u32_to_b4(cmd + 4, addr_adj);
addr = is_pdi(p) && !mem_is_in_flash(m)? addr + m->offset: jtag3_memaddr(pgm, p, m, addr);
u32_to_b4(cmd + 4, addr);
if (jtag3_command(pgm, cmd, 8, &resp, "page erase") < 0)
return -1;
@@ -1975,8 +1971,8 @@ static int jtag3_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const AVRM
cmd[1] = CMD3_WRITE_MEMORY;
cmd[2] = 0;
if (mem_is_flash(m)) {
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
cmd[3] = jtag3_mtype(pgm, p, addr);
PDATA(pgm)->flash_pageaddr = ~0UL;
cmd[3] = jtag3_mtype(pgm, p, m, addr);
if (p->prog_modes & PM_PDI)
/* dynamically decide between flash/boot mtype */
dynamic_mtype = 1;
@@ -1997,7 +1993,7 @@ static int jtag3_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const AVRM
return n_bytes;
}
cmd[3] = p->prog_modes & (PM_PDI | PM_UPDI)? MTYPE_EEPROM_XMEGA: MTYPE_EEPROM_PAGE;
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_userrow(m) || mem_is_bootrow(m)) {
cmd[3] = MTYPE_USERSIG;
} else if (mem_is_boot(m)) {
@@ -2016,7 +2012,7 @@ static int jtag3_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const AVRM
pmsg_debug("%s(): block_size at addr %d is %d\n", __func__, addr, block_size);
if (dynamic_mtype)
cmd[3] = jtag3_mtype(pgm, p, addr);
cmd[3] = jtag3_mtype(pgm, p, m, addr);
u32_to_b4(cmd + 8, page_size);
u32_to_b4(cmd + 4, jtag3_memaddr(pgm, p, m, addr));
@@ -2076,7 +2072,7 @@ static int jtag3_paged_load(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
cmd[2] = 0;
if (mem_is_flash(m)) {
cmd[3] = jtag3_mtype(pgm, p, addr);
cmd[3] = jtag3_mtype(pgm, p, m, addr);
if (p->prog_modes & PM_PDI)
/* dynamically decide between flash/boot mtype */
dynamic_mtype = 1;
@@ -2106,7 +2102,7 @@ static int jtag3_paged_load(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
pmsg_debug("%s(): block_size at addr %d is %d\n", __func__, addr, block_size);
if (dynamic_mtype)
cmd[3] = jtag3_mtype(pgm, p, addr);
cmd[3] = jtag3_mtype(pgm, p, m, addr);
u32_to_b4(cmd + 8, block_size);
u32_to_b4(cmd + 4, jtag3_memaddr(pgm, p, m, addr));
@@ -2282,7 +2278,7 @@ static int jtag3_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM
*
* Page cache validation is based on "{flash,eeprom}_pageaddr"
* (holding the base address of the most recent cache fill
* operation). This variable is set to (unsigned long)-1L when the
* operation). This variable is set to ~0UL when the
* cache needs to be invalidated.
*/
if (pagesize && paddr == *paddr_ptr) {
@@ -2351,7 +2347,7 @@ static int jtag3_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
if (mem_is_flash(mem)) {
cache_ptr = PDATA(pgm)->flash_pagecache;
pagesize = PDATA(pgm)->flash_pagesize;
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
if (pgm->flag & PGM_FL_IS_DW)
unsupp = 1;
} else if (mem_is_eeprom(mem)) {
@@ -2361,7 +2357,7 @@ static int jtag3_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRME
cache_ptr = PDATA(pgm)->eeprom_pagecache;
pagesize = PDATA(pgm)->eeprom_pagesize;
}
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_a_fuse(mem) || mem_is_fuses(mem)) {
cmd[3] = MTYPE_FUSE_BITS;
if(!(p->prog_modes & PM_UPDI) && mem_is_a_fuse(mem))
@@ -2823,25 +2819,22 @@ static void jtag3_print_parms(const PROGRAMMER *pgm, FILE *fp) {
jtag3_print_parms1(pgm, "", fp);
}
static unsigned char jtag3_mtype(const PROGRAMMER *pgm, const AVRPART *p, unsigned long addr) {
if (p->prog_modes & PM_PDI) {
if (addr >= PDATA(pgm)->boot_start)
return MTYPE_BOOT_FLASH;
else
return MTYPE_FLASH;
} else {
return MTYPE_FLASH_PAGE;
}
static unsigned char jtag3_mtype(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m,
unsigned long addr) {
return
!is_pdi(p)? MTYPE_FLASH_PAGE:
mem_is_boot(m)? MTYPE_BOOT_FLASH:
mem_is_flash(m) && is_pdi(p) && addr >= PDATA(pgm)->boot_start? MTYPE_BOOT_FLASH:
MTYPE_FLASH;
}
static unsigned int jtag3_memaddr(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, unsigned long addr) {
if(is_pdi(p)) { // Xmega
/*
* All memories but "flash" are smaller than boot_start anyway, so
* no need for an extra check we are operating on "flash"
*/
if(addr >= PDATA(pgm)->boot_start)
if(mem_is_flash(m) && addr >= PDATA(pgm)->boot_start) // Boot is special and gets its own region
addr -= PDATA(pgm)->boot_start;
if(mem_is_in_flash(m) && !mem_is_boot(m)) // Apptable, application and flash
addr += avr_flash_offset(p, m, addr);
if(mem_is_in_sigrow(m)) {
AVRMEM *sigrow = avr_locate_sigrow(p);
if(sigrow)

12
src/jtagmkI.c
View File

@@ -504,7 +504,7 @@ static int jtagmkI_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
if (jtagmkI_reset(pgm) < 0)
return -1;
@@ -627,12 +627,12 @@ static int jtagmkI_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const AV
cmd[0] = CMD_WRITE_MEM;
if (mem_is_flash(m)) {
cmd[1] = MTYPE_FLASH_PAGE;
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
page_size = PDATA(pgm)->flash_pagesize;
is_flash = 1;
} else if (mem_is_eeprom(m)) {
cmd[1] = MTYPE_EEPROM_PAGE;
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
page_size = PDATA(pgm)->eeprom_pagesize;
}
datacmd[0] = CMD_DATA;
@@ -856,7 +856,7 @@ static int jtagmkI_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRM
*
* Page cache validation is based on "{flash,eeprom}_pageaddr"
* (holding the base address of the most recent cache fill
* operation). This variable is set to (unsigned long)-1L when the
* operation). This variable is set to ~0UL when the
* cache needs to be invalidated.
*/
if (pagesize && paddr == *paddr_ptr) {
@@ -928,12 +928,12 @@ static int jtagmkI_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVR
if (mem_is_flash(mem)) {
cmd[1] = MTYPE_SPM;
need_progmode = 0;
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
} else if (mem_is_eeprom(mem)) {
cmd[1] = MTYPE_EEPROM;
need_progmode = 0;
need_dummy_read = 1;
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_a_fuse(mem) || mem_is_fuses(mem)) {
cmd[1] = MTYPE_FUSE_BITS;
need_dummy_read = 1;

14
src/jtagmkII.c
View File

@@ -1276,7 +1276,7 @@ static int jtagmkII_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
if (PDATA(pgm)->fwver >= 0x700 && (p->prog_modes & (PM_PDI | PM_UPDI))) {
/*
@@ -1897,7 +1897,7 @@ static int jtagmkII_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const A
cmd = mmt_malloc(page_size + 10);
cmd[0] = CMND_WRITE_MEMORY;
if (mem_is_flash(m)) {
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
cmd[1] = jtagmkII_mtype(pgm, p, addr);
if (p->prog_modes & (PM_PDI | PM_UPDI)) // Dynamically decide between flash/boot mtype
dynamic_mtype = 1;
@@ -1918,7 +1918,7 @@ static int jtagmkII_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const A
return n_bytes;
}
cmd[1] = p->prog_modes & (PM_PDI | PM_UPDI)? MTYPE_EEPROM_XMEGA: MTYPE_EEPROM_PAGE;
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_userrow(m) || mem_is_bootrow(m)) {
cmd[1] = MTYPE_USERSIG;
} else if (mem_is_boot(m)) {
@@ -2227,7 +2227,7 @@ static int jtagmkII_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVR
*
* Page cache validation is based on "{flash,eeprom}_pageaddr"
* (holding the base address of the most recent cache fill
* operation). This variable is set to (unsigned long)-1L when the
* operation). This variable is set to ~0UL when the
* cache needs to be invalidated.
*/
if (pagesize && paddr == *paddr_ptr) {
@@ -2309,14 +2309,14 @@ static int jtagmkII_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AV
writesize = 2;
if(str_eq(p->family_id, "megaAVR") || str_eq(p->family_id, "tinyAVR")) // AVRs with UPDI except AVR-Dx/Ex
need_progmode = 0;
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
if (pgm->flag & PGM_FL_IS_DW)
unsupp = 1;
} else if (mem_is_eeprom(mem)) {
cmd[1] = p->prog_modes & (PM_PDI | PM_UPDI)? MTYPE_EEPROM_XMEGA: MTYPE_EEPROM;
if(str_eq(p->family_id, "megaAVR") || str_eq(p->family_id, "tinyAVR")) // AVRs with UPDI except AVR-Dx/Ex
need_progmode = 0;
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
} else if (mem_is_a_fuse(mem) || mem_is_fuses(mem)) {
cmd[1] = MTYPE_FUSE_BITS;
if((p->prog_modes & PM_Classic) && mem_is_a_fuse(mem))
@@ -2978,7 +2978,7 @@ static int jtagmkII_initialize32(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
for(j=0; j<2; ++j) {
buf[0] = CMND_GET_IR;

1
src/libavrdude.h
View File

@@ -277,6 +277,7 @@ typedef struct opcode {
#define is_avr32jtag(x) (!!((x)->prog_modes & PM_AVR32JTAG))
#define is_awire(x) (!!((x)->prog_modes & PM_aWire))
#define is_classic(x) (!!((x)->prog_modes & PM_Classic))
#define is_avr32(x) (!!((x)->prog_modes & (PM_AVR32JTAG | PM_aWire)))
// Set of overlapping programming modes of programmer and part
#define joint_pm(pgm, p) ((pgm)->prog_modes & (p)->prog_modes)

14
src/stk500v2.c
View File

@@ -1315,7 +1315,7 @@ static int stk500v2_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
if (p->flags & AVRPART_IS_AT90S1200) {
/*
@@ -1456,7 +1456,7 @@ static int stk500v2_jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
return pgm->program_enable(pgm, p);
}
@@ -1620,7 +1620,7 @@ static int stk500hv_initialize(const PROGRAMMER *pgm, const AVRPART *p, enum hvm
mmt_free(PDATA(pgm)->eeprom_pagecache);
PDATA(pgm)->flash_pagecache = mmt_malloc(PDATA(pgm)->flash_pagesize);
PDATA(pgm)->eeprom_pagecache = mmt_malloc(PDATA(pgm)->eeprom_pagesize);
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = (unsigned long) -1L;
PDATA(pgm)->flash_pageaddr = PDATA(pgm)->eeprom_pageaddr = ~0UL;
return pgm->program_enable(pgm, p);
}
@@ -2334,7 +2334,7 @@ static int stk500hv_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVR
*
* Page cache validation is based on "{flash,eeprom}_pageaddr"
* (holding the base address of the most recent cache fill
* operation). This variable is set to (unsigned long)-1L when the
* operation). This variable is set to ~0UL when the
* cache needs to be invalidated.
*/
if (pagesize && paddr == *paddr_ptr) {
@@ -2612,7 +2612,7 @@ static int stk500hv_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AV
if (pagesize) {
/* Invalidate the page cache. */
*paddr_ptr = (unsigned long)-1L;
*paddr_ptr = ~0UL;
}
return 0;
@@ -2893,7 +2893,7 @@ static int stk500hv_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const A
// determine which command is to be used
if (mem_is_flash(m)) {
addrshift = 1;
PDATA(pgm)->flash_pageaddr = (unsigned long)-1L;
PDATA(pgm)->flash_pageaddr = ~0UL;
commandbuf[0] = mode == PPMODE? CMD_PROGRAM_FLASH_PP: CMD_PROGRAM_FLASH_HVSP;
/*
* If bit 31 is set, this indicates that the following read/write
@@ -2905,7 +2905,7 @@ static int stk500hv_paged_write(const PROGRAMMER *pgm, const AVRPART *p, const A
use_ext_addr = (1U << 31);
}
} else if (mem_is_eeprom(m)) {
PDATA(pgm)->eeprom_pageaddr = (unsigned long)-1L;
PDATA(pgm)->eeprom_pageaddr = ~0UL;
commandbuf[0] = mode == PPMODE? CMD_PROGRAM_EEPROM_PP: CMD_PROGRAM_EEPROM_HVSP;
}
/*