Add browsave and crcboot config values

This commit is contained in:
stefanrueger
2025-02-28 15:07:46 +01:00
parent c4ac9a7efa
commit 75c4a76879

View File

@@ -11512,6 +11512,15 @@ static const Configvalue _values_s8535c_at90s8535comp[2] = {
{1, "c8535_disabled", "AT90S4434/8535 compatibility mode disabled"},
};
/*
* AVR16DU14 AVR16DU20 AVR16DU28 AVR16DU32 AVR32DU14 AVR32DU20 AVR32SD20 AVR32DU28 AVR32SD28
* AVR32DU32 AVR32SD32 AVR64DU28 AVR64DU32
*/
static const Configvalue _values_browsave_avr16du14[2] = {
{0, "br_erased", "BOOTROW is erased during chip erase"},
{1, "br_preserved", "BOOTROW is preserved during chip erase"},
};
/*
* AVR16DU14 AVR16DU20 AVR16DU28 AVR16DU32 AVR32DU14 AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28
* AVR64DU32
@@ -11549,6 +11558,12 @@ static const Configvalue _values_nvmkey_avr32sd20[2] = {
{0xb45, "nvmact", "NVM Protection active"},
};
// AVR32SD20 AVR32SD28 AVR32SD32
static const Configvalue _values_crcboot_avr32sd20[2] = {
{0, "cb_no", "No CRC scan of boot section during reset"},
{1, "cb_yes", "CRC scan of boot section during reset"},
};
// AVR32SD20 AVR32SD28 AVR32SD32
static const Configvalue _values_wdtmon_avr32sd20[4] = {
{0, "off", "Monitor is disabled"},
@@ -13520,7 +13535,7 @@ const Configitem cfgtab_avr16du14[20] = {
{"bodlevel", 4, _values_bodlevel_avr32dd14, "bodcfg", 1, 0xe0, 5, 0, "brownout detection level"},
{"clksel", 2, _values_clksel_avr32dd14, "osccfg", 2, 0x07, 0, 0, "oscillator frequency"},
{"eesave", 2, _values_eesave_attiny204, "syscfg0", 5, 0x01, 0, 0, "EEPROM after chip erase"},
{"browsave", 0, NULL, "syscfg0", 5, 0x02, 1, 0, "Boot Row Save"},
{"browsave", 2, _values_browsave_avr16du14, "syscfg0", 5, 0x02, 1, 0, "BOOTROW after chip erase"},
{"rstpincfg", 2, _values_rstpincfg_avr32dd14, "syscfg0", 5, 0x08, 3, 0, "reset pin configuration"},
{"updipincfg", 2, _values_updipincfg_avr32dd14, "syscfg0", 5, 0x10, 4, 1, "UPDI pin configuration"},
{"crcsel", 2, _values_crcsel_avr32dd14, "syscfg0", 5, 0x20, 5, 0, "CRC select"},
@@ -13565,9 +13580,9 @@ const Configitem cfgtab_avr32sd20[18] = {
{"bodsampfreq", 2, _values_bodsampfreq_avr32dd14, "bodcfg", 1, 0x10, 4, 0, "brownout detection sampling frequency"},
{"bodlevel", 4, _values_bodlevel_avr32dd14, "bodcfg", 1, 0xe0, 5, 0, "brownout detection level"},
{"eesave", 2, _values_eesave_attiny204, "syscfg0", 5, 0x01, 0, 0, "EEPROM after chip erase"},
{"browsave", 0, NULL, "syscfg0", 5, 0x02, 1, 0, "Boot Row Saved"},
{"browsave", 2, _values_browsave_avr16du14, "syscfg0", 5, 0x02, 1, 0, "BOOTROW after chip erase"},
{"crcsel", 2, _values_crcsel_avr32dd14, "syscfg0", 5, 0x40, 6, 0, "CRC select"},
{"crcboot", 0, NULL, "syscfg0", 5, 0x80, 7, 0, "CRC Boot"},
{"crcboot", 2, _values_crcboot_avr32sd20, "syscfg0", 5, 0x80, 7, 0, "CRC of boot section during reset"},
{"sut", 8, _values_sut_attiny204, "syscfg1", 6, 0x07, 0, 0, "startup time"},
{"mvsyscfg", 3, _values_mvsyscfg_avr32sd20, "syscfg1", 6, 0x18, 3, 1, "MVIO system configuration"},
{"wdtmon", 4, _values_wdtmon_avr32sd20, "syscfg1", 6, 0xc0, 6, 1, "WDT Monitor Configuration"},