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https://github.com/avrdudes/avrdude.git
synced 2026-09-21 16:46:30 +03:00
Add browsave and crcboot config values
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@@ -11512,6 +11512,15 @@ static const Configvalue _values_s8535c_at90s8535comp[2] = {
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{1, "c8535_disabled", "AT90S4434/8535 compatibility mode disabled"},
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};
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/*
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* AVR16DU14 AVR16DU20 AVR16DU28 AVR16DU32 AVR32DU14 AVR32DU20 AVR32SD20 AVR32DU28 AVR32SD28
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* AVR32DU32 AVR32SD32 AVR64DU28 AVR64DU32
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*/
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static const Configvalue _values_browsave_avr16du14[2] = {
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{0, "br_erased", "BOOTROW is erased during chip erase"},
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{1, "br_preserved", "BOOTROW is preserved during chip erase"},
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};
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/*
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* AVR16DU14 AVR16DU20 AVR16DU28 AVR16DU32 AVR32DU14 AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28
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* AVR64DU32
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@@ -11549,6 +11558,12 @@ static const Configvalue _values_nvmkey_avr32sd20[2] = {
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{0xb45, "nvmact", "NVM Protection active"},
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};
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// AVR32SD20 AVR32SD28 AVR32SD32
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static const Configvalue _values_crcboot_avr32sd20[2] = {
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{0, "cb_no", "No CRC scan of boot section during reset"},
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{1, "cb_yes", "CRC scan of boot section during reset"},
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};
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// AVR32SD20 AVR32SD28 AVR32SD32
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static const Configvalue _values_wdtmon_avr32sd20[4] = {
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{0, "off", "Monitor is disabled"},
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@@ -13520,7 +13535,7 @@ const Configitem cfgtab_avr16du14[20] = {
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{"bodlevel", 4, _values_bodlevel_avr32dd14, "bodcfg", 1, 0xe0, 5, 0, "brownout detection level"},
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{"clksel", 2, _values_clksel_avr32dd14, "osccfg", 2, 0x07, 0, 0, "oscillator frequency"},
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{"eesave", 2, _values_eesave_attiny204, "syscfg0", 5, 0x01, 0, 0, "EEPROM after chip erase"},
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{"browsave", 0, NULL, "syscfg0", 5, 0x02, 1, 0, "Boot Row Save"},
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{"browsave", 2, _values_browsave_avr16du14, "syscfg0", 5, 0x02, 1, 0, "BOOTROW after chip erase"},
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{"rstpincfg", 2, _values_rstpincfg_avr32dd14, "syscfg0", 5, 0x08, 3, 0, "reset pin configuration"},
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{"updipincfg", 2, _values_updipincfg_avr32dd14, "syscfg0", 5, 0x10, 4, 1, "UPDI pin configuration"},
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{"crcsel", 2, _values_crcsel_avr32dd14, "syscfg0", 5, 0x20, 5, 0, "CRC select"},
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@@ -13565,9 +13580,9 @@ const Configitem cfgtab_avr32sd20[18] = {
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{"bodsampfreq", 2, _values_bodsampfreq_avr32dd14, "bodcfg", 1, 0x10, 4, 0, "brownout detection sampling frequency"},
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{"bodlevel", 4, _values_bodlevel_avr32dd14, "bodcfg", 1, 0xe0, 5, 0, "brownout detection level"},
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{"eesave", 2, _values_eesave_attiny204, "syscfg0", 5, 0x01, 0, 0, "EEPROM after chip erase"},
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{"browsave", 0, NULL, "syscfg0", 5, 0x02, 1, 0, "Boot Row Saved"},
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{"browsave", 2, _values_browsave_avr16du14, "syscfg0", 5, 0x02, 1, 0, "BOOTROW after chip erase"},
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{"crcsel", 2, _values_crcsel_avr32dd14, "syscfg0", 5, 0x40, 6, 0, "CRC select"},
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{"crcboot", 0, NULL, "syscfg0", 5, 0x80, 7, 0, "CRC Boot"},
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{"crcboot", 2, _values_crcboot_avr32sd20, "syscfg0", 5, 0x80, 7, 0, "CRC of boot section during reset"},
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{"sut", 8, _values_sut_attiny204, "syscfg1", 6, 0x07, 0, 0, "startup time"},
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{"mvsyscfg", 3, _values_mvsyscfg_avr32sd20, "syscfg1", 6, 0x18, 3, 1, "MVIO system configuration"},
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{"wdtmon", 4, _values_wdtmon_avr32sd20, "syscfg1", 6, 0xc0, 6, 1, "WDT Monitor Configuration"},
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