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https://github.com/avrdudes/avrdude.git
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Add lds command for reduced-core ATtiny
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@@ -265,7 +265,6 @@ int disasm_init(const AVRPART *p) {
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* 8 untreated opcodes and 20 "unofficial" ones
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*
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* OPCODE_lds_rc
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* OPCODE_spm_zz
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* OPCODE_sts_rc
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*
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* OPCODE_x_bld
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@@ -372,6 +371,7 @@ int disasm_init(const AVRPART *p) {
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Register_Opcode(ldz4_Callback, "10q0 qq0d dddd 0qqq", OPCODE_ldd_2);
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Register_Opcode(ldi_Callback, "1110 KKKK dddd KKKK", OPCODE_ldi);
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Register_Opcode(lds_Callback, "1001 000d dddd 0000 kkkk kkkk kkkk kkkk", OPCODE_lds);
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Register_Opcode(lds_rc_Callback, "1010 0kkk dddd kkkk", OPCODE_lds_rc);
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Register_Opcode(lpm1_Callback, "1001 0101 1100 1000", OPCODE_lpm_1);
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Register_Opcode(lpm2_Callback, "1001 000d dddd 0100", OPCODE_lpm_2);
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Register_Opcode(lpm3_Callback, "1001 000d dddd 0101", OPCODE_lpm_3);
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@@ -565,6 +565,21 @@ CALLBACK(lds_Callback) {
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}
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}
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CALLBACK(lds_rc_Callback) {
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const char *MemAddress;
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/*
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* ADDR[7:0] ← (/INST[8], INST[8], INST[10], INST[9], INST[3], INST[2], INST[1], INST[0])
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* ADDR[7:0] ← (/k[4], k[4], k[6], k[5], k[3], k[2], k[1], k[0])
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*/
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int addr = (Rk & 0xf) | ((Rk >> 1) & 0x30) | ((Rk & 0x10) << 2) | (((Rk & 0x10) ^ 0x10) << 3);
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snprintf(cx->dis_code, 255, "%-7s r%d, 0x%02x", avr_opcodes[mnemo].opcode, Rd+16, addr);
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MemAddress = Tagfile_Resolve_Mem_Address(addr);
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if(MemAddress)
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snprintf(cx->dis_comment, 255, "%s", MemAddress);
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}
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CALLBACK(lpm1_Callback) {
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Operation_Simple(mnemo);
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}
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@@ -134,6 +134,7 @@ void ldz3_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void ldz4_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void ldi_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void lds_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void lds_rc_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void lpm1_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void lpm2_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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void lpm3_Callback(const char *Bitstream, int Position, AVR_opcode mnemo);
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