Mirrors/avrdude
1
0
Fork 0
mirror of https://github.com/avrdudes/avrdude.git synced 2026-10-02 16:09:00 +03:00
Code Issues Packages Projects Releases Wiki Activity

Auto-adjust cycles for parts with 3-byte PC

Browse Source
This commit is contained in:
Stefan Rueger
2024-07-22 22:21:01 +01:00
parent cdcb8fa8a2
commit dadd9c52cd
2 changed files with 24 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/avr_opcodes.c
View File

@@ -193,22 +193,22 @@ const AVR_opcode_data avr_opcodes[164] = {
{"3", "3", "3", "n/a"}, ""},
{OP_ID(rcall), 0xf000, 0xd000, 1, OP_AVR1, "1101 kkkk kkkk kkkk", OTY_RJMX,
"rcall", "k", "Relative Call Subroutine", "PC <-- PC + k + 1", "--------",
{"3/4", "2/3", "2/3", "3"}, ""},
{"3+", "2+", "2+", "3"}, ""},
{OP_ID(icall), 0xffff, 0x9509, 1, OP_AVR2, "1001 0101 0000 1001", OTY_JMPI,
"icall", "", "Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------",
{"3/4", "2/3", "2/3", "3"}, ""},
{"3+", "2+", "2+", "3"}, ""},
{OP_ID(eicall), 0xffff, 0x9519, 1, OP_AVR_XL, "1001 0101 0001 1001", OTY_JMPX,
"eicall", "", "Extended Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------",
{"4", "3", "3", "n/a"}, ""},
{OP_ID(call), 0xfe0e, 0x940e, 2, OP_AVR_M, "1001 010k kkkk 111k kkkk kkkk kkkk kkkk", OTY_JMPX,
"call", "k", "call Subroutine", "PC <-- k, STACK <-- PC, SP <-- SP - 2", "--------",
{"4/5", "3/4", "3/4", "n/a"}, ""},
{"4+", "3+", "3+", "n/a"}, ""},
{OP_ID(ret), 0xffff, 0x9508, 1, OP_AVR1, "1001 0101 0000 1000", OTY_JMPX,
"ret", "", "Subroutine Return", "PC <-- STACK", "--------",
{"4/5", "4/5", "4/5", "6"}, ""},
{"4+", "4+", "4+", "6"}, ""},
{OP_ID(reti), 0xffff, 0x9518, 1, OP_AVR1, "1001 0101 0001 1000", OTY_JMPX,
"reti", "", "Interrupt Return", "PC <-- STACK", "I-------",
{"4/5", "4/5", "4/5", "6"}, ""},
{"4+", "4+", "4+", "6"}, ""},
{OP_ID(cpse), 0xfc00, 0x1000, 1, OP_AVR1, "0001 00rd dddd rrrr", OTY_SKPI|OTY_RALL,
"cpse", "Rd, Rr", "Compare, Skip if Equal", "if(Rd=Rr) PC <-- PC + 2/3", "--------",
{"1-3", "1-3", "1-3", "1/2"}, ""},
@@ -551,16 +551,16 @@ const AVR_opcode_data avr_opcodes[164] = {
{"1", "1", "1", "1"}, ""},
{OP_ID(u_icall), 0xff1f, 0x9509, 1, OP_AVR_ILL, "1001 0101 xxx0 1001", OTY_JMPI,
"u/icall", "", "alt Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------",
{"3/4", "2/3", "2/3", "3"}, "xxx != 000"},
{"3+", "2+", "2+", "3"}, "xxx != 000"},
{OP_ID(u_eicall), 0xff1f, 0x9519, 1, OP_AVR_ILL, "1001 0101 xxx1 1001", OTY_JMPX,
"u/eicall", "", "alt Extended Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------",
{"4", "3", "3", "n/a"}, "xxx != 000"},
{OP_ID(u_ret), 0xff9f, 0x9508, 1, OP_AVR_ILL, "1001 0101 0xx0 1000", OTY_JMPX,
"u/ret", "", "alt Subroutine Return", "PC <-- STACK", "--------",
{"4/5", "4/5", "4/5", "6"}, "xx != 00"},
{"4+", "4+", "4+", "6"}, "xx != 00"},
{OP_ID(u_reti), 0xff9f, 0x9518, 1, OP_AVR_ILL, "1001 0101 0xx1 1000", OTY_JMPX,
"u/reti", "", "alt Interrupt Return", "PC <-- STACK", "I-------",
{"4/5", "4/5", "4/5", "6"}, "xx != 00"},
{"4+", "4+", "4+", "6"}, "xx != 00"},
{OP_ID(u_nop_8), 0xffff, 0x95b8, 1, OP_AVR_ILL, "1001 0101 1011 1000", OTY_MCUI,
"u/nop", "", "alt No Operation", "-", "--------",
{"1", "1", "1", "1"}, ""},

17
src/disasm.c
View File

@@ -851,6 +851,21 @@ static void disassemble(const char *buf, int addr, int opcode, AVR_opcode mnemo,
*c = 0;
}
// Increase cycle number by 1 if it's a 3 byte PC
static const char *cycles(int mnemo) {
if(mnemo < 0)
return "---";
const char *ret = avr_opcodes[mnemo].clock[cx->dis_cycle_index];
// A plus sign after the cycle number means add one for 3-byte PC
if(*ret && ret[1] == '+')
return str_ccprintf("%c", cx->dis_flashsz > 128*1024? *ret+1: *ret);
return ret;
}
/*
* Disassemble buflen bytes at buf which corresponds to address addr
*
@@ -905,7 +920,7 @@ int disasm(const char *buf, int buflen, int addr, int leadin, int leadout) {
if(cx->dis_opts.show_flags)
term_out("%s ", mnemo < 0? "--------": avr_opcodes[mnemo].flags);
if(cx->dis_opts.show_cycles)
term_out("%3s ", mnemo < 0? "---": avr_opcodes[mnemo].clock[cx->dis_cycle_index]);
term_out("%3s ", cycles(mnemo));
}
if(cx->dis_opts.show_opcodes) {