px30: bl31: update version to v1.16

Build from ATF commit:
    58f9374 plat: px30: support uart0 wakeup
update feature:
    58f9374 plat: px30: support uart0 wakeup
    a8e7839 plat: px30: support atags
    655d673 rockchip: gicv3: fix some SGI operation interface
    dc11506 rockchip: ddr_parameter: use "struct tag_ddr_mem" to parse
    f303135 build: bl31: disable bl31.bin build for rockchip platform
    cc5829b rockchip: common: i2c: clean up code
    3669605 plat: px30: support boot from secondary cpu
    85b4ee0 rockchip: support boot from secondary cpu
    c15bf5d rockchip: uart: fix uart save/restore flow
    5bd5463 plat: px30: ddr: set PLL BP if it was PD before idle_port
    c0933ee rockchip: common: atags: sync from u-boot
    5301828 plat: px30: ddr: remove register prefetch for UART2
    69635d9 plat: px30: ddr: update noc timing

Change-Id: Ieaa10fbb82b77775fbbd84692172baf04791451a
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
XiaoDong Huang
2019-08-14 15:17:27 +08:00
parent a4c99b293f
commit 0af851e08b
2 changed files with 1 additions and 1 deletions

View File

@@ -5,7 +5,7 @@ MINOR=0
SEC=0
[BL31_OPTION]
SEC=1
PATH=bin/rk33/px30_bl31_v1.15.elf
PATH=bin/rk33/px30_bl31_v1.16.elf
ADDR=0x00010000
[BL32_OPTION]
SEC=1