px30: bl31: update version to v1.16
Build from ATF commit:
58f9374 plat: px30: support uart0 wakeup
update feature:
58f9374 plat: px30: support uart0 wakeup
a8e7839 plat: px30: support atags
655d673 rockchip: gicv3: fix some SGI operation interface
dc11506 rockchip: ddr_parameter: use "struct tag_ddr_mem" to parse
f303135 build: bl31: disable bl31.bin build for rockchip platform
cc5829b rockchip: common: i2c: clean up code
3669605 plat: px30: support boot from secondary cpu
85b4ee0 rockchip: support boot from secondary cpu
c15bf5d rockchip: uart: fix uart save/restore flow
5bd5463 plat: px30: ddr: set PLL BP if it was PD before idle_port
c0933ee rockchip: common: atags: sync from u-boot
5301828 plat: px30: ddr: remove register prefetch for UART2
69635d9 plat: px30: ddr: update noc timing
Change-Id: Ieaa10fbb82b77775fbbd84692172baf04791451a
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
@@ -5,7 +5,7 @@ MINOR=0
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SEC=0
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[BL31_OPTION]
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SEC=1
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PATH=bin/rk33/px30_bl31_v1.15.elf
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PATH=bin/rk33/px30_bl31_v1.16.elf
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ADDR=0x00010000
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[BL32_OPTION]
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SEC=1
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