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rv1126: ddr: Update ddr bin to v1.09 20221025

Browse Source 
Build from:
	8fef64cfb9 dram_init: rv1126: Update to v1.09

Update feature:
	0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
	181bc4650d drivers: ram: rv1126: Fix read_mr()
	1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
	9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
	56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
	1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
	d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
This commit is contained in:
Wesley Yao
2022-10-25 20:30:20 +08:00
parent d906ef3382
commit 1df9ddc0e5
10 changed files with 50 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
RKBOOT/RV1126MINIALL.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=5
[CODE471_OPTION]
NUM=1
Path1=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
Path1=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rv11/rv1126_usbplug_v1.23.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
FlashBoot=bin/rv11/rv1126_spl_v1.09.bin
[OUTPUT]
PATH=rv1126_spl_loader_v1.08.109.bin
PATH=rv1126_spl_loader_v1.09.109.bin

6
RKBOOT/RV1126MINIALL_FTL.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=5
[CODE471_OPTION]
NUM=1
Path1=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
Path1=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rv11/rv1126_usbplug_ftl_v1.23.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
FlashBoot=bin/rv11/rv1126_miniloader_ftl_v1.23.bin
[OUTPUT]
PATH=rv1126_loader_v1.08.123.bin
PATH=rv1126_loader_v1.09.123.bin

8
RKBOOT/RV1126MINIALL_IPC.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=5
[CODE471_OPTION]
NUM=1
Path1=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
Path1=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,10 +14,10 @@ Path1=bin/rv11/rv1126_usbplug_v1.23.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
FlashBoot=bin/rv11/rv1126_spl_v1.09.bin
[OUTPUT]
PATH=rv1126_download_v1.08.109.bin
IDB_PATH=rv1126_idblock_v1.08.109.img
PATH=rv1126_download_v1.09.109.bin
IDB_PATH=rv1126_idblock_v1.09.109.img
[FLAG]
CREATE_IDB=true

6
RKBOOT/RV1126MINIALL_RAMBOOT.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=5
[CODE471_OPTION]
NUM=1
Path1=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
Path1=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rv11/rv1126_ramboot_v1.12.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
FlashBoot=bin/rv11/rv1126_ramboot_v1.12.bin
[OUTPUT]
PATH=rv1126_ramboot_loader_v1.08.112.bin
PATH=rv1126_ramboot_loader_v1.09.112.bin

6
RKBOOT/RV1126MINIALL_SPI_NOR_TINY.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=5
[CODE471_OPTION]
NUM=1
Path1=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
Path1=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rv11/rv1126_usbplug_v1.23.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.08.bin
FlashData=bin/rv11/rv1126_ddr_924MHz_v1.09.bin
FlashBoot=bin/rv11/rv1126_spl_spi_nor_tiny_v1.01.bin
[OUTPUT]
PATH=rv1126_spl_loader_v1.08.101.bin
PATH=rv1126_spl_loader_v1.09.101.bin

BIN
bin/rv11/rv1126_ddr_1056MHz_v1.08.bin → bin/rv11/rv1126_ddr_1056MHz_v1.09.bin
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Binary file not shown.

BIN
bin/rv11/rv1126_ddr_784MHz_v1.08.bin → bin/rv11/rv1126_ddr_784MHz_v1.09.bin
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Binary file not shown.

BIN
bin/rv11/rv1126_ddr_924MHz_v1.08.bin → bin/rv11/rv1126_ddr_924MHz_v1.09.bin
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Binary file not shown.

17
doc/release/RV1126_CN.md
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@@ -1,5 +1,22 @@
# RV1126 Release Note
## rv1126_ddr_{1056 ... 784}MHz_v1.09.bin
| 时间 | 文件 | 编译 commit | 重要程度 |
| ---------- | :------------------------------------- | ----------- | -------- |
| 2022-10-25 | rv1126_ddr_{1056 ... 784}MHz_v1.09.bin | 8fef64cfb9 | 紧急 |
### Fixed
| Index | 重要程度 | 更新说明 | 问题现象 | 问题来源 |
| ----- | -------- | ------------------------------------ | ------------------------------------------------------------ | -------- |
| 1 | 紧急 | 解决 LPDDR4X MRR 错误的问题 | MRR 函数中关于 LPDDR4X 的判断逻辑有缺陷，导致 LPDDR4X MRR 数据可能错误 | - |
| 2 | 重要 | 解决部分 LPDDR4 颗粒 528MHz 报错问题 | 代码未考虑到少部分颗粒 Wr Lvl 结果可能会是负数，导致 Wr Lvl 结果判断可能出错 | 358198 |
| 3 | 普通 | 解决部分颗粒 timing 设置错误问题 | t_xs_x32、t_xs_abort_x32、t_xs_fast_x32 设置有误，其它平台上发现在小容量颗粒（小于128M）上会引起异常 | - |
| 4 | 重要 | 解决部分 x32 LPDDR3 不稳定的问题 | LPDDR3 的探测流程有缺陷，导致部分 x32 LPDDR3 会被识别成 x16，进而导致部分 timing 配置错误 | 322844 |
------
## rv1126_tee_ta_v2.08.bin
| 时间 | 文件 | 编译 commit | 重要程度 |

17
doc/release/RV1126_EN.md
View File

@@ -1,5 +1,22 @@
# RV1126 Release Note
## rv1126_ddr_{1056 ... 784}MHz_v1.09.bin
| Date | File | Build commit | Severity |
| ---------- | :------------------------------------- | ------------ | -------- |
| 2022-10-25 | rv1126_ddr_{1056 ... 784}MHz_v1.09.bin | 8fef64cfb9 | critical |
### Fixed
| Index | Severity | Update | Issue description | Issue source |
| ----- | --------- | -------------------------------------- | ------------------------------------------------------------ | ------------ |
| 1 | critical | Fix problem of LPDDR4X MRR error | The judgment logic of LPDDR4X in the MRR function is defective. As a result, the LPDDR4X MRR data may be incorrect. | - |
| 2 | important | Fix error of some LPDDR4 in 528MHz | The code does not consider that the Wr Lvl result of some LPDDR4 may be negative, which may lead to error in the judgment of Wr Lvl result. | 358198 |
| 3 | moderate | Fix timing error of some DDR | The settings of t_xs_x32, t_xs_abort_x32, and t_xs_fast_x32 are incorrect. Some DDR (less than 128M) may fail in other platform. | - |
| 4 | important | Fix some x32 LPDDR3 instability issues | The detection process of LPDDR3 is defective. Part of x32 LPDDR3 is identified as x16, which results in some timing setting errors. | 322844 |
------
## rv1126_tee_ta_v2.08.bin
| Date | File | Build commit | Severity |