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rk3588: ddr: update ddrbin to v1.17

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build from:
        3488111f83 dram_init: rk3588: update to v1.17
update feature:
        1. Fixed the error of pll_id setting when boot_fsp!=0.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
This commit is contained in:
YouMin Chen
2024-04-09 11:24:19 +08:00
parent b57d8cc4f3
commit 3339cc42a5
8 changed files with 38 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
RKBOOT/RK3588MINIALL.ini
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@@ -5,7 +5,7 @@ MAJOR=1
MINOR=11
[CODE471_OPTION]
NUM=1
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,10 +14,10 @@ Path1=bin/rk35/rk3588_usbplug_v1.11.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
FlashBoot=bin/rk35/rk3588_spl_v1.13.bin
[OUTPUT]
PATH=rk3588_spl_loader_v1.16.113.bin
PATH=rk3588_spl_loader_v1.17.113.bin
[SYSTEM]
NEWIDB=true
[FLAG]

8
RKBOOT/RK3588MINIALL_IPC.ini
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@@ -5,7 +5,7 @@ MAJOR=1
MINOR=11
[CODE471_OPTION]
NUM=1
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,11 +14,11 @@ Path1=bin/rk35/rk3588_usbplug_v1.11.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
FlashBoot=bin/rk35/rk3588_spl_v1.13.bin
[OUTPUT]
PATH=rk3588_download_v1.16.113.bin
IDB_PATH=rk3588_idblock_v1.16.113.img
PATH=rk3588_download_v1.17.113.bin
IDB_PATH=rk3588_idblock_v1.17.113.img
[SYSTEM]
NEWIDB=true
[FLAG]

2
RKBOOT/RK3588MINIALL_PCIE_EP.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=11
[CODE471_OPTION]
NUM=1
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
Sleep=1
[CODE472_OPTION]
NUM=1

4
RKBOOT/RK3588MINIALL_RAMBOOT.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=6
[CODE471_OPTION]
NUM=1
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -17,7 +17,7 @@ LOADER2=FlashBoot
FlashData=bin/rk35/rk3588_ramboot_null0.bin
FlashBoot=bin/rk35/rk3588_ramboot_null1.bin
[OUTPUT]
PATH=rk3588_ramboot_loader_v1.16.106.bin
PATH=rk3588_ramboot_loader_v1.17.106.bin
[SYSTEM]
NEWIDB=true
[FLAG]

BIN
bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
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BIN
bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin Normal file
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14
doc/release/RK3588_CN.md
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@@ -1,5 +1,19 @@
# RK3588 Release Note
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
| 时间 | 文件 | 编译 commit | 重要程度 |
| ---------- | :------------------------------------------- | ----------- | -------- |
| 2024-04-12 | rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin | 3488111f83 | 重要 |
### Fixed
| Index | 重要程度 | 更新说明 | 问题现象 | 问题来源 |
| ----- | -------- | ------------------------------------------------------------ | -------------------------------------------- | -------- |
| 1 | 重要 | 修正当boot_fsp配为非0值后pll_id设置错误问题，boot_fsp默认值为0。 | 当boot_fsp配为非0值后概率性出现DDR初始化失败 | - |
------
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
| 时间 | 文件 | 编译 commit | 重要程度 |

14
doc/release/RK3588_EN.md
View File

@@ -1,5 +1,19 @@
# RK3588 Release Note
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
| Date | File | Build commit | Severity |
| ---------- | :------------------------------------------- | ------------ | --------- |
| 2024-04-12 | rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin | 3488111f83 | important |
### Fixed
| Index | Severity | Update | Issue description | Issue source |
| ----- | --------- | ------------------------------------------------------------ | ------------------------------------------------------------ | ------------ |
| 1 | important | Fixed the error of pll_id setting when boot_fsp!=0，the default value of boot_fsp is 0. | Maybe hang in ddr initialization when boot_fsp is configured to a non-zero value. | - |
------
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.16.bin
| Date | File | Build commit | Severity |