px30: ddr: update ddr bin to v1.16

build from:
	2f76446 rk3326/px30: ddr: updata to v1.16 20210528

update feature:
	69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
	14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
	6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
	1e8bea7 rk3326/px30: ddr: add support ssmod
	8c20176 rk3326/px30: ddr: add DPLL power down and up

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id1b3ff152a756cd18acb00a65482127063bcb541
This commit is contained in:
Zhihuan He
2021-01-11 18:00:26 +08:00
parent 73945d35fd
commit 413d2f55e5
4 changed files with 6 additions and 6 deletions

View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=31
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.15.bin
Path1=bin/rk33/px30_ddr_333MHz_v1.16.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_v1.31.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.15.bin
FlashData=bin/rk33/px30_ddr_333MHz_v1.16.bin
FlashBoot=bin/rk33/px30_miniloader_v1.31.bin
[OUTPUT]
PATH=px30_loader_v1.15.131.bin
PATH=px30_loader_v1.16.131.bin

View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=07
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.15.bin
Path1=bin/rk33/px30_ddr_333MHz_v1.16.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_slc_v1.31.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.15.bin
FlashData=bin/rk33/px30_ddr_333MHz_v1.16.bin
FlashBoot=bin/rk33/px30_miniloader_slc_v1.31.bin
[OUTPUT]
PATH=px30_loader_slc_v1.15.131.bin
PATH=px30_loader_slc_v1.16.131.bin

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