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rk3326/px30: ddr: Update ddr bin to V2.02 20220118 to support rk3326-s/px30-s

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build from RK3326_DDR_Init_Simple:
	d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118

update feature:
	6faa6a326a rk3326-s: Set VDD_logic to 1.0V
	8e81392239 rk3326-s: Disable some low power functions to prevent sleep and resume
(level 2) fail
	9590d94add px30s: can not support row = 17 of lp4
	c699c118bb px30s: modify dfi_tlp_resp to 0xa
	df3d5d15fc px30s: modify vdd_logic to 0.9v
	0fa00910a4 px30s: clear ddr clk gate for soft reset
	08f7c28847 rk3326/rk3326s: Optimize the size of ddr bin
	153b747d5f rk3326-s: Fix get_uboot_params() when sdram_params->ch.row_3_4 == 1
	3b83b56391 rk3326s: set logic to 1.0V
	a8eced54fb rk3326/s: all dram bring up ok
	b280140e97 rk3326/s: add debug info
	c4b391e8b4 rk3326/rk3326s: modify dfi timing for lp3/2
	cec9c2868b rk3326/rk3326s: diff dfi tctrl_delay setting
	de967f4b65 rk3326/rk3326s: modify dfi timing
	fa9c9e3f4f rk3326s: add fix drv odt config
	c534fef2c6 rk3326s: add support lp4
	69776fa864 rk3326: inc: add rk3326s phy reg
	3a1078c07d RK3326S: modify to PHY_REG_3326S define
	fc7426a9a7 rk3326/S: save and restore arm special reg
	2651ce4f97 rk3326/S: add check return to smc code

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Id91158b3d6decc57366dc3259e232f24da6b64ce
This commit is contained in:
Wesley Yao
2022-01-18 15:53:19 +08:00
committed by Jianhong Chen
parent 8ff1cbf38e
commit 750302a720
11 changed files with 21 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
RKBOOT/PX30MINIALL.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=35
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.16.bin
Path1=bin/rk33/px30_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_v1.35.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/px30_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/px30_miniloader_v1.35.bin
[OUTPUT]
PATH=px30_loader_v1.16.135.bin
PATH=px30_loader_v2.02.135.bin

6
RKBOOT/PX30MINIALL_SLC.ini Executable file → Normal file
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=07
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.16.bin
Path1=bin/rk33/px30_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_slc_v1.35.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/px30_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/px30_miniloader_slc_v1.35.bin
[OUTPUT]
PATH=px30_loader_slc_v1.16.135.bin
PATH=px30_loader_slc_v2.02.135.bin

6
RKBOOT/PX30MINIALL_WO_FTL.ini Executable file → Normal file
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=07
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.16.bin
Path1=bin/rk33/px30_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_wo_ftl_v1.35.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/px30_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/px30_miniloader_wo_ftl_v1.35.bin
[OUTPUT]
PATH=px30_loader_wo_ftl_v1.16.135.bin
PATH=px30_loader_wo_ftl_v2.02.135.bin

6
RKBOOT/RK3326AARCH32MINIALL.ini Executable file → Normal file
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=16
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
Path1=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_v1.34.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/rk3326_miniloader_aarch32_v1.16.bin
[OUTPUT]
PATH=rk3326_loader_aarch32_v1.16.116.bin
PATH=rk3326_loader_aarch32_v2.02.116.bin

6
RKBOOT/RK3326AARCH32MINIALL_SLC.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=16
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
Path1=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_slc_v1.28.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/rk3326_miniloader_aarch32_slc_v1.29.bin
[OUTPUT]
PATH=rk3326_loader_aarch32_slc_v1.16.129.bin
PATH=rk3326_loader_aarch32_slc_v2.02.129.bin

6
RKBOOT/RK3326MINIALL.ini
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=35
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
Path1=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_v1.35.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/rk3326_miniloader_v1.35.bin
[OUTPUT]
PATH=rk3326_loader_v1.16.135.bin
PATH=rk3326_loader_v2.02.135.bin

6
RKBOOT/RK3326MINIALL_SLC.ini Executable file → Normal file
View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=7
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
Path1=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_slc_v1.35.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/rk3326_ddr_333MHz_v1.16.bin
FlashData=bin/rk33/rk3326_ddr_333MHz_v2.02.bin
FlashBoot=bin/rk33/rk3326_miniloader_slc_v1.35.bin
[OUTPUT]
PATH=rk3326_loader_slc_v1.16.135.bin
PATH=rk3326_loader_slc_v2.02.135.bin

BIN
bin/rk33/px30_ddr_333MHz_v1.16.bin
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BIN
bin/rk33/px30_ddr_333MHz_v2.02.bin Normal file
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BIN
bin/rk33/rk3326_ddr_333MHz_v1.16.bin
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BIN
bin/rk33/rk3326_ddr_333MHz_v2.02.bin Normal file
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