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rk3368: ddr: using uart3 in ddr init code

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changing uart debug port from uart 2 to uart3, and DDR init code
version update to v2.00.

Change-Id: Ib055d348be739881dc14ebd829c3fc85b25113c5
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
This commit is contained in:
Tang Yun ping
2017-03-23 09:55:49 +08:00
parent af812af4c3
commit 7f4dd6f05e
4 changed files with 6 additions and 6 deletions
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6
RKBOOT/RK3368.ini Executable file → Normal file
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@@ -5,7 +5,7 @@ MAJOR=2
MINOR=27
[CODE471_OPTION]
NUM=1
Path1=tools/rk_tools/bin/rk33/rk3368_ddr_800MHz_v1.18.bin
Path1=tools/rk_tools/bin/rk33/rk3368_ddr_600MHz_v2.00.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=tools/rk_tools/bin/rk33/rk3368_usbplug_v2.56.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=tools/rk_tools/bin/rk33/RK3368_DDR_800M_V1.18.bin
FlashData=tools/rk_tools/bin/rk33/RK3368_DDR_600M_V2.00.bin
FlashBoot=u-boot.bin
[OUTPUT]
PATH=rk3368_bootloader_v1.18.bin
PATH=rk3368_bootloader_v2.00.bin

6
RKBOOT/RK3368MINIALL.ini Executable file → Normal file
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@@ -5,7 +5,7 @@ MAJOR=2
MINOR=56
[CODE471_OPTION]
NUM=1
Path1=tools/rk_tools/bin/rk33/rk3368_ddr_800MHz_v1.18.bin
Path1=tools/rk_tools/bin/rk33/rk3368_ddr_600MHz_v2.00.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=tools/rk_tools/bin/rk33/rk3368_usbplug_v2.56.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=tools/rk_tools/bin/rk33/rk3368_ddr_800MHz_v1.18.bin
FlashData=tools/rk_tools/bin/rk33/rk3368_ddr_600MHz_v2.00.bin
FlashBoot=tools/rk_tools/bin/rk33/rk3368_miniloader_v2.56.bin
[OUTPUT]
PATH=rk3368_loader_v1.18.256.bin
PATH=rk3368_loader_v2.00.256.bin

BIN
bin/rk33/rk3368_ddr_600MHz_v2.00.bin Executable file
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BIN
bin/rk33/rk3368_ddr_800MHz_v1.18.bin
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