px30: ddr: update ddr bin to v1.15

print info: DDR V1.15 20200511

build from:
    cfe1927 rk3326/px30: ddr: updata to v1.15 20200511
update feature:
    fix uart0/uart5 clk select and iomux bug.

Change-Id: I2fbe6d306baa3ee4111e75489b83c50187ed89c3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
This commit is contained in:
Tang Yun ping
2020-05-11 20:11:17 +08:00
committed by Jianhong Chen
parent 2908909e18
commit a20a4c6a7b
3 changed files with 6 additions and 6 deletions

View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=22
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.14.bin
Path1=bin/rk33/px30_ddr_333MHz_v1.15.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_v1.22.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.14.bin
FlashData=bin/rk33/px30_ddr_333MHz_v1.15.bin
FlashBoot=bin/rk33/px30_miniloader_v1.22.bin
[OUTPUT]
PATH=px30_loader_v1.14.122.bin
PATH=px30_loader_v1.15.122.bin

View File

@@ -5,7 +5,7 @@ MAJOR=1
MINOR=07
[CODE471_OPTION]
NUM=1
Path1=bin/rk33/px30_ddr_333MHz_v1.14.bin
Path1=bin/rk33/px30_ddr_333MHz_v1.15.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_slc_v1.21.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
FlashData=bin/rk33/px30_ddr_333MHz_v1.14.bin
FlashData=bin/rk33/px30_ddr_333MHz_v1.15.bin
FlashBoot=bin/rk33/px30_miniloader_slc_v1.21.bin
[OUTPUT]
PATH=px30_loader_slc_v1.14.121.bin
PATH=px30_loader_slc_v1.15.121.bin