rk3326: ddr: update ddr init bin to v1.12

print info: print info: DDR Version 1.12 20190528

from commit:
	cbe7c08 rk3326: ddr: init code update to v1.12
update feature:
	6e65fc3 rk3326: ddr: enable 2T mode for DDR3
	4bd8b62 RK3326: ddr: fix wrong uart base address for atags

Change-Id: I56b0d05320adaadc773ed585c816265c605604a8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

RKBOOT/RK3326MINIALL.ini

@@ -5,7 +5,7 @@ MAJOR=1
 MINOR=16
 [CODE471_OPTION]
 NUM=1
-Path1=bin/rk33/rk3326_ddr_333MHz_v1.11.bin
+Path1=bin/rk33/rk3326_ddr_333MHz_v1.12.bin
 Sleep=1
 [CODE472_OPTION]
 NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_v1.16.bin
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=bin/rk33/rk3326_ddr_333MHz_v1.11.bin
+FlashData=bin/rk33/rk3326_ddr_333MHz_v1.12.bin
 FlashBoot=bin/rk33/rk3326_miniloader_v1.16.bin
 [OUTPUT]
-PATH=rk3326_loader_v1.11.116.bin
+PATH=rk3326_loader_v1.12.116.bin

RKBOOT/RK3326MINIALL_SLC.ini

@@ -5,7 +5,7 @@ MAJOR=1
 MINOR=7
 [CODE471_OPTION]
 NUM=1
-Path1=bin/rk33/rk3326_ddr_333MHz_v1.11.bin
+Path1=bin/rk33/rk3326_ddr_333MHz_v1.12.bin
 Sleep=1
 [CODE472_OPTION]
 NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/rk3326_usbplug_slc_v1.15.bin
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=bin/rk33/rk3326_ddr_333MHz_v1.11.bin
+FlashData=bin/rk33/rk3326_ddr_333MHz_v1.12.bin
 FlashBoot=bin/rk33/rk3326_miniloader_slc_v1.15.bin
 [OUTPUT]
-PATH=rk3326_loader_slc_v1.11.115.bin
+PATH=rk3326_loader_slc_v1.12.115.bin